• Title/Summary/Keyword: pick & placement

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Heavy-Weight Component First Placement Algorithm for Minimizing Assembly Time of Printed Circuit Board Component Placement Machine

  • Lee, Sang-Un
    • Journal of the Korea Society of Computer and Information
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    • v.21 no.3
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    • pp.57-64
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    • 2016
  • This paper deals with the PCB assembly time minimization problem that the PAP (pick-and-placement) machine pickup the K-weighted group of N-components, loading, and place into the PCB placement location. This problem considers the rotational turret velocity according to component weight group and moving velocity of distance in two component placement locations in PCB. This paper suggest heavy-weight component group first pick-and-place strategy that the feeder sequence fit to the placement location Hamiltonean cycle sequence. This algorithm applies the quadratic assignment problem (QAP) that considers feeder sequence and location sequence, and the linear assignment problem (LAP) that considers only feeder sequence. The proposed algorithm shorten the assembly time than iATMA for QAP, and same result as iATMA that shorten the assembly time than ATMA.

Fast Component Placement with Optimized Long-Stroke Passive Gravity Compensation Integrated in a Cylindrical/Tubular PM Actuator

  • Paulides, J.J.H.;Encica, L.;Meessen, K.J.;Lomonova, E.A.
    • Journal of international Conference on Electrical Machines and Systems
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    • v.2 no.3
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    • pp.275-282
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    • 2013
  • Applications such as vibration isolation, gravity compensation, pick-and-place machines, etc., would benefit from (long-stroke) cylindrical/tubular permanent magnet (PM) actuators with integrated passive gravity compensation to minimize the power consumption. As an example, in component placing (pick-and-place) machines on printed circuit boards, passive devices allow the powerless counteraction of translator including nozzles or tooling bits. In these applications, an increasing demand is arising for high-speed actuation with high precision and bandwidth capability mainly due to the placement head being at the foundation of the motion chain, hence, a large mass of this device will result in high force/power requirements for the driving mechanism (i.e. an H-bridge with three linear permanent magnet motors placed in an H-configuration). This paper investigates a tubular actuator topology combined with passive gravity compensation. These two functionalities are separately introduced, where the combination is verified using comprehensive three dimensional (3D) finite element analyses.

A Statistical Analysis Method for Image Processing Errors in the Position Alignment of BGA-type Semiconductor Packages (BGA형 반도체 패키지의 위치정렬용 영상처리기법 오차의 통계적 분석 방법)

  • Kim, Hak-Man;Seong, Sang Man;Kang, Kiho
    • Journal of Institute of Control, Robotics and Systems
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    • v.19 no.11
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    • pp.984-990
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    • 2013
  • Pick and placement systems need high speeds and reliability for the position alignment process of semiconductor packages in picking up and placing them on placement trays. Image processing is usually adopted for position aligning where finding out the most suitable method is considered most important aspect of the process. This paper proposes a method for judging the performance of different image processing algorithms based on the PCI (Process Capability Index). The PCI is an index which represents the error distribution acquired from many experimental data. The bigger the index, the more reliable the results or the lower the deviation. Two compared and candidate methods are Hough Transform and PCA (Principal Component Analysis), both of which are very suitable for oblong or rectangular type packages such as BGA's. Comparing the two approaches through a CPI with enough experimental results leads to the conclusion that the PCA is much better than the Hough Transform in not only reliability, but also processing speed.

An Image Processing Method for Aligning the Positions of Semiconductor Package using Principal Component Analysis (주성분분석법을 이용한 반도체패키지의 위치정렬 영상처리기법)

  • Kim, Hak-Man
    • Proceedings of the KAIS Fall Conference
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    • 2009.12a
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    • pp.850-853
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    • 2009
  • 반도체 조립공정에서 사용되는 Pick and Placement장비는 반도체패키지를 컴퓨터 비젼을 이용하여 위치 정렬하고 Placement Tray에 적재하는 장비로서 고속,고정밀도가 요구된다. 다변량 통계적 분석방법인 주성분 분석법은 주어진 데이터에서 특징이 되는 일정한 패턴을 찾는 방법으로 영상의 차원감소를 위해 최근 많이 사용되어지고 있다. 본 논문에서는 반도체패키지의 기하학적 형태를 이용하여 위치정렬을 하도록 한 후 성능을 검증하도록 하였다. 패키지 원영상에서 밝기값의 차이에 따른 윤곽선을 인식한 후, 각 위치값들을 주성분 분석법을 이용해 직선을 추출한 방법으로 위치정렬한 결과 신뢰할만한 위치정렬 성능을 보였다.

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BGA to CSP to Flip Chip-Manufacturing Issues

  • Caswell, Greg;Partridge, Julian
    • Journal of the Microelectronics and Packaging Society
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    • v.8 no.2
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    • pp.37-42
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    • 2001
  • The BGA package has been the area array package of choice for several years. Recently, the transition has been to finer pitch configurations called Chip Scale Packages (CSP). Several of these package types are available at 0.5 mm pitch. requiring surface mount assemblers to evaluate and optimize various elements of the assembly process. This presentation describes the issues associated with making the transition from BGA to CSP assembly. Areas addressed will include the accuracy of pick and place equipment, printed wiring board lines and spaces, PWB vias, in-circuit test issues, solder paste printing, moisture related factors, rework and reliability. The transition to 0.5 mm pitch requires careful evaluation of the board design, solder paste selection, stencil design and component placement accuracy. At this pitch, ball and board pad diameters can be as small as 0.25 mm and 0.20 mm respectively. Drilled interstitial vias are no longer possible and higher ball count packages require micro-via board technology. The transition to CSP requires careful evaluation of these issues. Normal paste registration and BGA component tolerances can no longer achieve the required process levels and higher accuracy pick and place machines need to be implemented. This presentation will examine the optimization of these critical assembly operations, contrast the challenges at 0.5 mm and also look at the continuation of the process to incorporate smaller pitch flip chip devices.

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BGA to CSP to Flip Chip - Manufacturing Issues

  • Caswell, Greg;Partridge, Julian
    • Proceedings of the International Microelectronics And Packaging Society Conference
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    • 2001.04a
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    • pp.27-34
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    • 2001
  • The BGA Package has been the area array package of choice for several rears. Recently, the transition has been to finer pitch configuration called Chip Scale Packages (CSP). Several of these package types are available at 0.5 mm pitch, requiring surface mount assemblers to evaluate and optimize various elements of the assembly process. This presentation describes the issues associated with making the transition from BGA to CSP assembly. Areas addressed will include the accuracy of pick and piece equipment, printed wiring board lines and spaces, PWB vias, in-circuit test issues, solder paste printing, moisture related factors, rework and reliability. The transition to 0.5 mm pitch requires careful evaluation of the board design, solder paste selection, stencil design and component placement accuracy. At this pitch, ball and board pad diameters can be as small as 0.25 mm and 0.20 mm respectively. Drilled interstitial vias are no longer possible and higher ball count packages require micro-via board technology. The transition to CSP requires careful evaluation of these issues. Normal paste registration and BGA component tolerances can no longer achieve the required process levels and higher accuracy pick and place machines need to be implemented. This presentation will examine the optimization of these critical assembly operations, contrast the challenges at 0.5 mm and also look at the continuation of the process to incorporate smaller pitch flip chip devices.

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Analysis of Reel Tape Packing process conditions using DOE (실험계획법을 이용한 Reel Tape Packaging 공정조건 분석)

  • Kim, Jae Kyung;Na, Seung Jun;Kwon, Jun Hwan;Jeon, Euy Sik
    • Journal of the Semiconductor & Display Technology
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    • v.19 no.2
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    • pp.105-109
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    • 2020
  • Today's placement machines can pick and place thousands of components per hour with a very high degree of accuracy. The packaged semiconductor chips are inserted into a carrier at regular intervals, covered with a tape to protect the chips from external impact, and supplied in a roll form. These packaging processes also progress rapidly in a consistent direction, affecting the peelback strength between the cover tape and carrier depending on the main process conditions. In this paper, we analyzed the main process variables that affect peelback strength in the reel tape packaging process for packaging semiconductor chips. The main effects and interactions were analyzed. The peelback strength range required in the packaging process was set as the nominal the best characteristics, and the optimum process condition satisfying this was derived.

Optimization of Data Placement using Principal Component Analysis based Pareto-optimal method for Multi-Cloud Storage Environment

  • Latha, V.L. Padma;Reddy, N. Sudhakar;Babu, A. Suresh
    • International Journal of Computer Science & Network Security
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    • v.21 no.12
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    • pp.248-256
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    • 2021
  • Now that we're in the big data era, data has taken on a new significance as the storage capacity has exploded from trillion bytes to petabytes at breakneck pace. As the use of cloud computing expands and becomes more commonly accepted, several businesses and institutions are opting to store their requests and data there. Cloud storage's concept of a nearly infinite storage resource pool makes data storage and access scalable and readily available. The majority of them, on the other hand, favour a single cloud because of the simplicity and inexpensive storage costs it offers in the near run. Cloud-based data storage, on the other hand, has concerns such as vendor lock-in, privacy leakage and unavailability. With geographically dispersed cloud storage providers, multicloud storage can alleviate these dangers. One of the key challenges in this storage system is to arrange user data in a cost-effective and high-availability manner. A multicloud storage architecture is given in this study. Next, a multi-objective optimization problem is defined to minimise total costs and maximise data availability at the same time, which can be solved using a technique based on the non-dominated sorting genetic algorithm II (NSGA-II) and obtain a set of non-dominated solutions known as the Pareto-optimal set.. When consumers can't pick from the Pareto-optimal set directly, a method based on Principal Component Analysis (PCA) is presented to find the best answer. To sum it all up, thorough tests based on a variety of real-world cloud storage scenarios have proven that the proposed method performs as expected.

MATERIALS AND METHODS FOR TEACHING INTONATION

  • Ashby, Michael
    • Proceedings of the KSPS conference
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    • 1997.07a
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    • pp.228-229
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    • 1997
  • 1 Intonation is important. It cannot be ignored. To convince students of the importance of intonation, we can use sentences with two very different interpretations according to intonation. Example: "I thought it would rain" with a fallon "rain" means it did not rain, but with a fall on "thought" and a rise on "rain" it means that it did rain. 2 Although complex, intonation is structured. For both teacher and student, the big job of tackling intonation is made simpler by remembering that intonation can be analysed into systems and units. There are three main systems in English intonation: Tonality (division into phrases) Tonicity (selection of accented syllables) Tone (the choice of pitch movements) Examples: Tonality: My brother who lives in London is a doctor. Tonicity: Hello. How ARE you. Hello. How are YOU. Tone: Ways to say "Thank you" 3 In deciding what to teach, we must distinguish what is universal from what is specifically English. This is where contrastive studies of intonation are very valuable. Usually, for instance, division into phrases (tonality) works in broadly similar ways across languages. Some uses of pitch are also similar across languages - for example, very high pitch may signal excitement or urgency. 4 Although most people think that intonation is mainly about pitch (the tone system), actually accent placement (tonicity) is probably the single most important aspect of English intonation. This is because it is connected with information focus, and the effects on interpretation are very clear-cut. Example: They asked for coffee, so I made them coffee. (The second occurrence of "coffee" must not be accented). 5 Ear-training is the beginning of intonation training in the VeL approach. First, students learn to identify fall vs rise vs fall-rise. To begin with, single words are used, then phrases and sentences. When learning tones, the fIrst words used should have unstressed syllables after the stressed syllable (Saturday) to make the pitch movement clearer. 6 In production drills, the fIrst thing is to establish simple neutral patterns. There should be no drama or really special meanings. Simple drills can be used to teach important patterns: Example: A: Peter likes football B: Yes JOHN likes football TOO A: Mary rides a bike B: Yes JENny rides a bike TOO 7 The teacher must be systematic and let learners KNOW what they are learning. It is no good using new patterns and hoping that students will "pick them up" without noticing. 8 Visual feedback of fundamental frequency with a computer display can help students learn correct patterns. The teacher can use the display to demonstrate patterns, or students can practise by themselves, imitating recorded models.

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A Technique of Replacing XML Semantic Cache (XML 시맨틱 캐쉬의 교체 기법)

  • Hong, Jung-Woo;Kang, Hyun-Chul
    • The Journal of Society for e-Business Studies
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    • v.12 no.3
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    • pp.211-234
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    • 2007
  • In e-business, XML is a major format of data and it is essential to efficiently process queries against XML data. XML query caching has received much attention for query performance improvement. In employing XML query caching, some efficient technique of cache replacement is required. The previous techniques considered as a replacement unit either the whole query result or the path in the query result. The former is simple to employ but it is not efficient whereas the latter is more efficient and yet the size difference among the potential victims is large, and thus, efficiency of caching would be limited. In this paper, we propose a new technique where the element in the query result is are placement unit to overcome the limitations of the previous techniques. The proposed technique could enhance the cache efficiency to a great extent because it would not pick a victim whose size is too large to store a new cached item, the variance in the size of victims would be small, and the unused space of the cache storage would be small. A technique of XML semantic cache replacement is presented which is based on the replacement function that takes into account cache hit ratio, last access time, fetch time, size of XML semantic region, size of element in XML semantic region, etc. We implemented a prototype XML semantic cache system that employs the proposed technique, and conducted a detailed set of experiments over a LAN environment. The experimental results showed that our proposed technique outperformed the previous ones.

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