• Title/Summary/Keyword: photolithography

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Recent development of polymer optical circuits for the next generation fiber to the home system

  • Kaino, Toshikuni
    • Proceedings of the Polymer Society of Korea Conference
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    • 2006.10a
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    • pp.13-14
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    • 2006
  • The use of soft-lithography instead of standard photolithography and dry etching technologies is attractive because inexpensive optical device can be realized. Polymerization using multi-photon absorption of materials is also a good method for optical waveguide fabrication. Laser induced self-writing technology of optical waveguide is also very simple and attractive. Using these processes, we can fabricate and interconnect optical circuits at once. In this presentation, several simple fabrication methods will be introduced. New optical loss evaluation method for polymer optical waveguides will also be presented

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Synthesis of Imide Monomers for Application to Organic Photosensitive Interdielectric Layer

  • Kwon, Hyeok-Yong;Vu, Quang Hung;Lee, Yun-Soo;Park, Lee-Soon
    • 한국정보디스플레이학회:학술대회논문집
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    • 2008.10a
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    • pp.816-819
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    • 2008
  • A negative photoresist formulation was developed utilizing synthesized UV monomers containing imide linkage, photoinitiator, UV oligomer, and alkali developable polymer matrix. It was found that via-holes with good resolution, high transmittance and thermal resistance could be obtained by photolithographic process utilizing the negative-type photoresist formulations.

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Photolithographic Formation of GOD Immobilized Membranes for ISFET Glucose Sensors (ISFET 포도당센서를 위한 GOD 고정화막의 사진식각 형성법)

  • 김창수;최성문;서화일;김의락;손병기
    • Journal of the Korean Institute of Telematics and Electronics A
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    • v.29A no.4
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    • pp.58-63
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    • 1992
  • Photolithography techniques were applied for immobilization of GOD membrane on the pH-ISFET with photo-sensitive polymers to realize ISEFT glucose sensor. This IC technology-compatible glucose sensor showed good sensing characteristics in the wide range of 10-1000 mg/dl glucose concentrations.

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Study for photoconduction mechanism of a single ZnO nanowire (단일 ZnO 나노선의 광전도 메카니즘에 대한 연구)

  • Keem, Ki-Hyun;Kim, Sang-Sig
    • Proceedings of the KIEE Conference
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    • 2005.11a
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    • pp.60-61
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    • 2005
  • Electrodes were fabricated on a single ZnO nanowire by photolithography process, metal evaporation, and lift-off. The slow photoresponses of the ZnO nanowire under the continuous illumination of 325nm-wavelength light (corresponding to above-bandgap excitation) indicate that the traps related to oxygen vacancy disturb the flow of electron in ZnO nanowire. The photoresponse and PL spectra were measured, and observed that the excitonic band in the PL spectrum was absent in the photoresponse.

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미세입자분사 가공에서 Photoresist를 이용한 마스크의 가공특성에 관한 연구

  • 박동진;이인환;고태조;김희술
    • Proceedings of the Korean Society of Precision Engineering Conference
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    • 2004.05a
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    • pp.127-127
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    • 2004
  • 입자분사 가공(abrasive jet machining)은 과거에는 녹(rust) 도색(painting)의 제거 흑은 디버링(deburring), 표면 처리 등의 용도에 국한되어 사용되어졌다. 한편 최근 들어 반도체 제작공정이나 MEMS 공정 등에 적용되는 실리콘(silicon) 등의 세라믹 재료의 미세가공분야가 주목받고 있으며, 따라서 이와 관련된 많은 연구가 진행되고 있다. 한편, 세라믹 재료는 파괴인성이 매우 낮고 취성이 강하기 때문에 크랙발생 후 큰 응력이 연속적으로 주어지면 크랙은 음속으로 진행되어 파단 되는 특성이 있어서 일반적인 기계가공이 매우 어렵다.(중략)

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Synthesis of Lead Selenide Nanowires by Photolithography and Electrodeposition Process (포토리소그래피와 도금을 사용한 셀레늄화 납 나노와이어 합성)

  • Song, Yeong-Seop;Lee, Ju-Yeol;Lee, Gyu-Hwan;Im, Jae-Hong
    • Proceedings of the Korean Institute of Surface Engineering Conference
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    • 2014.11a
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    • pp.305-305
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    • 2014
  • 포토리소그래피와 도금 공정을 통해 PbSe 나노와이어를 합성하였다. PbSe은 광센서 및 열전 물질로 많이 알려져있다. 이러한 응용처에의 향상된 성능을 위해 본 연구에서는 PbSe 나노와이를 합성하였다. 합성에 사용된 방법인 포토리소그래피와 도금 공정은 반도체 산업 전반에 인프라가 잘 구축된 공정이며, 병렬 공정이다. 따라서 본 연구는 경제적이며 대량생산이 가능한 PbSe 나노와이어의 합성법을 제안한다.

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LGE's 60-inch AC Plasma Display Panel with $1365{\times}768$

  • Park, Myung-Ho
    • 한국정보디스플레이학회:학술대회논문집
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    • 2000.01a
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    • pp.225-227
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    • 2000
  • LGE developed and demonstrated the first 60-inch full color AC plasma display panel with the 1365 ${\times}$ 768 resolution. Both Sol-gel and E-beam method have been tried for MgO layer, and photolithography has been used for electrodes and phosphor layer to fabricate a 60-inch panel. Selective Erase, Selective Write, Address Display Separate, and Address While Display driving scheme have been tested. Its luminance and contrast ratio is about $550\;cd/m^2$ and 500:1, respectively.

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Improvement in Electrical Stability of poly-Si TFT Employing Vertical a-Si Offsets

  • Park, J.W.;Park, K.C.;Han, M.K.
    • 한국정보디스플레이학회:학술대회논문집
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    • 2000.01a
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    • pp.67-68
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    • 2000
  • Polycrystalline silicon (poly-Si) thin film transistors (TFT's) employing vertical amorphous silicon (a-Si) offsets have been fabricated without additional photolithography processes. The a-Si offset has been formed utilizing the poly-Si grain growth blocking effect by thin native oxide film during the excimer laser recrystallization of a-Si. The ON current degradation of the new device after 4 hour's electrical stress was reduced by 5 times compared with conventional poly-Si TFT's.

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