• 제목/요약/키워드: path balancing

검색결과 122건 처리시간 0.031초

스크류 잭 및 댐퍼를 이용한 가동질량 레일의 평형제어 (The Balancing Control of Moving Mass Rail by a Screw Jack and Damper)

  • 변정환;최명수
    • 동력기계공학회지
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    • 제11권1호
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    • pp.134-139
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    • 2007
  • A delivery ship is used to handle the cargo with the crane to/from the ships. The ship is inclined in the direction of a cargo which is hung on a crane. In this case, a arc shaped rail should be in the equilibrium state to get good anti-rolling performance. In this study, a device and control algorithm are developed to take accurate and quick equilibrium of the rail. The device is composed of a hinged immovable support, screw jack and damper. And the control system is based on I-PD control law to consider of control input saturation and overshoot. The controller is composed of integral controller of feedforward path and proportional-derivative controller of feedback path. The parameters of controller is designed to follow the reference signal and to remove overshoot. The simulation results show that the desirable control performance is achieved.

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글리치를 고려한 매핑가능 클러스터 생성 방법을 이용한 저전력 알고리즘 (The Low Power Algorithm using a Feasible Clustert Generation Method considered Glitch)

  • 김재진
    • 디지털산업정보학회논문지
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    • 제12권2호
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    • pp.7-14
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    • 2016
  • In this paper presents a low power algorithm using a feasible cluster generation method considered glitch. The proposed algorithm is a method for reducing power consumption of a given circuit. The algorithm consists of a feasible cluster generation process and glitches removal process. So that glitches are not generated for the node to which the switching operation occurs most frequently in order to reduce the power consumption is a method for generating a feasible cluster. A feasible cluster generation process consisted of a node value set, dividing the node, the node aligned with the feasible cluster generation. A feasible cluster generation procedure is produced from the highest number of nodes in the output. When exceeding the number of OR-terms of the inputs of the selected node CLB prevents the signal path is varied by the evenly divided. If there are nodes with the same number of outputs selected by the first highest number of nodes in the input produces a feasible cluster. Glitch removal process removes glitches through the path balancing in the same manner as [5]. Experimental results were compared with the proposed algorithm [5]. Number of blocks has been increased by 5%, the power consumption was reduced by 3%.

Recurrent Ant Colony Optimization for Optimal Path Convergence in Mobile Ad Hoc Networks

  • Karmel, A;Jayakumar, C
    • KSII Transactions on Internet and Information Systems (TIIS)
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    • 제9권9호
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    • pp.3496-3514
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    • 2015
  • One of the challenging tasks in Mobile Ad hoc Network is to discover precise optimal routing solution due to the infrastructure-less dynamic behavior of wireless mobile nodes. Ant Colony Optimization, a swarm Intelligence technique, inspired by the foraging behaviour of ants in colonies was used in the past research works to compute the optimal path. In this paper, we propose a Recurrent Ant Colony Optimization (RECACO) that executes the actual Ant Colony Optimization iteratively based on recurrent value in order to obtain an optimal path convergence. Each iteration involves three steps: Pheromone tracking, Pheromone renewal and Node selection based on the residual energy in the mobile nodes. The novelty of our approach is the inclusion of new pheromone updating strategy in both online step-by-step pheromone renewal mode and online delayed pheromone renewal mode with the use of newly proposed metric named ELD (Energy Load Delay) based on energy, Load balancing and end-to-end delay metrics to measure the performance. RECACO is implemented using network simulator NS2.34. The implementation results show that the proposed algorithm outperforms the existing algorithms like AODV, ACO, LBE-ARAMA in terms of Energy, Delay, Packet Delivery Ratio and Network life time.

OFPT: OpenFlow based Parallel Transport in Datacenters

  • Liu, Bo;XU, Bo;Hu, Chao;Hu, Hui;Chen, Ming
    • KSII Transactions on Internet and Information Systems (TIIS)
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    • 제10권10호
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    • pp.4787-4807
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    • 2016
  • Although the dense interconnection datacenter networks (DCNs) (e.g. FatTree) provide multiple paths and high bisection bandwidth for each server pair, the single-path TCP (SPT) and ECMP which are widely used currently neither achieve high bandwidth utilization nor have good load balancing. Due to only one available transmission path, SPT cannot make full use of all available bandwidth, while ECMP's random hashing results in many collisions. In this paper, we present OFPT, an OpenFlow based Parallel Transport framework, which integrates precise routing and scheduling for better load balancing and higher network throughput. By adopting OpenFlow based centralized control mechanism, OFPT computes the optimal path and bandwidth provision for each flow according to the global network view. To guarantee high throughput, OFPT dynamically schedules flows with Seamless Flow Migration Mechanism (SFMM), which can avoid packet loss in flow rerouting. Finally, we test OFPT on Mininet and implement it in a real testbed. The experimental results show that the average network throughput in OFPT is up to 97.5% of bisection bandwidth, which is higher than ECMP by 36%. Besides, OFPT decreases the average flow completion time (AFCT) and achieves better scalability.

통계적 최적화를 위한 확률적 글리치 예측 및 경로 균등화 방법 (Stochastic Glitch Estimation and Path Balancing for Statistical Optimization)

  • 신호순;김주호;이형우
    • 대한전자공학회논문지SD
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    • 제43권8호
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    • pp.35-43
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    • 2006
  • 이 논문에서는 공정 변이의 고려를 위한 통계적 시간 분석(statistical timing analysis)에서 전력감소를 고려한 회로의 최적화를 위해 글리치 및 지연시간의 확률적 모델 및 연산을 이용하여 각 경로 및 경로상의 게이트의 민감도(sensitivity)를 계산하고 이를 이용한 사이징(sizing)을 통해 회로의 지연시간의 증가 없이 글리치를 감소하는 방법을 제시한다. 제안된 알고리즘은 통계적 시간 분석에 근거한 회로의 전후방 탐색을 이용하여 공정 변수를 고려한 확률적 글리치 발생률을 예측한다. 또한 글리치 발생률을 고려한 게이트의 선택 및 사이징 가능한 지연시간의 최적화된 계산을 통해 효율적인 게이트 사이징 기법과 글리치 감소를 위한 경로균등화 방법을 제시한다. 제안된 알고리즘의 효율성은 $0.16{\mu}m$ 모델 파라미터를 이용하여 ISCAS85 벤치마크 회로에 대한 실험을 통해 검증되었다. 실험 결과를 통해 제안된 알고리즘은 글리치 예측에 있어 8.6%의 정확도의 개선을 보였고, 경로균등화에 의한 최적화에 있어 9.5%의 개선을 보였다.

통계적 기법을 이용한 경로 선택 알고리즘 (A Route Selection Algorithm using a Statistical Approach)

  • 김영민;안상현
    • 한국정보과학회논문지:정보통신
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    • 제29권1호
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    • pp.57-64
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    • 2002
  • 현재 사용중인 경로 선택 방법은 최단 경로 알고리즘을 이용하므로 망 자원을 효율적으로 이용하지 못하며 특정 경로로 트래픽이 집중될 경우 혼잡(congestion) 상황을 발생시킬 수 있다. 본 논문에서는 새롭게 요청되는 연결 설정 요구에 대해 요청된 대역폭을 충족시킬 수 있는 경로를 결정하는데 있어서 통계적 기법을 이용함으로써 망을 효율적으로 사용하며, 혼잡 상황을 줄일 수 있는 통계적 경로 선택(Statistical Route Selection; SRS) 알고리즘을 제안한다. MPLS의 등장으로 부하 균등화(load balancing)에 필요한 명시적인(explicit) LSP 설정을 할 수 있게 되었으며, MPLS의 LSP를 설정하기 위해 SRS 알고리즘을 이용할 수 있다. SRS 알고리즘은 경로 선택을 위해 링크들의 이용률을 구하고, 통계적인 기법을 사용하여 가중치를 결정하며, 그 가중치를 이용한 최단 경로를 구한다. 여기서 사용되는 통계적 기법은 링크들의 이용률의 평균과 분산을 이용하는 것으로, 이정보를 기반으로 링크의 가중치에 대해 분산을 작게 하는 방향으로 경로를 결정함으로써 부하 균등화 효과를 얻게 되어 혼잡 링크 수를 줄이고, 망 자원 이용률을 높인다. 실험을 통해 다른 경로 선택 알고리즘들에 비해 SRS 알고리즘이 망 자원을 효율적으로 이용하여 연결 설정 실패의 수와 혼잡 링크의 수를 줄이는 것을 보인다.

저전력 CMOS 디지털 회로 설계에서 경로 균등화에 의한 글리치 감소기법 (Glitch Reduction Through Path Balancing for Low-Power CMOS Digital Circuits)

  • 양재석;김성재;김주호;황선영
    • 한국정보과학회논문지:시스템및이론
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    • 제26권10호
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    • pp.1275-1283
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    • 1999
  • 본 논문은 CMOS 디지털 회로에서의 전력 소모의 주원인인 신호의 천이중에서 회로의 동작에 직접적인 영향을 미치지 않는 불필요한 신호의 천이인 글리치를 줄이기 위한 효율적인 알고리즘을 제시한다. 제안된 알고리즘은 회로의 지연 증가 없이 게이트 사이징과 버퍼 삽입에 의해 경로 균등(path balancing)을 이룸으로써 글리치를 감소시킨다. 경로 균등화를 위하여 먼저 게이트 사이징을 통해 글리치의 감소와 동시에, 게이트 크기의 최적화를 통해 회로 전체의 캐패시턴스까지 줄일 수 있으며, 게이트 사이징 만으로 경로 균등화가 이루어지지 않을 경우 버퍼 삽입으로 경로 균등화를 이루게 된다. 버퍼 자체에 의한 전력 소모 증가보다 글리치 감소에 의한 전력 감소가 큰 버퍼를 선택하여 삽입한다. 이때 버퍼 삽입에 의한 전력 감소는 다른 버퍼의 삽입 상태에 따라 크게 달라질 수 있어 ILP (Integer Linear Program)를 이용하여 적은 버퍼 삽입으로 전력 감소를 최대화 할 수 있는 저전력 설계 시스템을 구현하였다. 제안된 알고리즘은 LGSynth91 벤치마크 회로에 대한 테스트 결과 회로의 지연 증가 없이 평균적으로 30.4%의 전력 감소를 얻을 수 있었다.Abstract This paper presents an efficient algorithm for reducing glitches caused by spurious transitions in CMOS logic circuits. The proposed algorithm reduces glitches by achieving path balancing through gate sizing and buffer insertion. The gate sizing technique reduces not only glitches but also effective capacitance in the circuit. In the proposed algorithm, the buffers are inserted between the gates where power reduction achieved by glitch reduction is larger than the additional power consumed by the inserted buffers. To determine the location of buffer insertion, ILP (Integer Linear Program) has been employed in the proposed system. The proposed algorithm has been tested on LGSynth91 benchmark circuits. Experimental results show an average of 30.4% power reduction.

하악 측방운동시 평형측 과두의 운동 궤적에 관한 컴퓨터 분석 (A COMPUTER ANALYSIS ON THE CONDYLAR PATH OF BALANCING SIDE IN MANDIBULAR LATERAL MOVEMENT)

  • 이동현;최대균;박남수
    • 대한치과보철학회지
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    • 제31권4호
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    • pp.549-564
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    • 1993
  • The purpose of this study was to research the condylar path and the anterior angle of glenoid fossae and classify the patterns of condylar path. Thirty male and female dental students with normal occlesion and masticatory system ranging in age from 21 to 30, without present symptoms and an)r history of TM joint disturbance, were selected for this study. Transcranial radiographs of TM joints under mandibular lateral movement were obtained. By the computer analysis on the radiographs, the angle of posterior slope of articular eminance, the sagittal condylar guidance angie, condylar movement patterns and the height of glenoid fossa was measured respectively, and studied their interrelationship comparatively. The results obtained were as follows : 1. The total distance of condylar movement on balancing side during mandibular lateral movement was 4.55mm for Lt. and 4.78mm for Rt. when mandible moved from C.R. to canine to canine relation and 7.86mm for the Lt. and 8.10mm for the Rt. when mandible moved from C.R. to 7.5mm. 2. The horizontal distance of condylar movement on balancing side during mandibular lateral movements was 3.16mm for the Lt. and 3.52mm for the Rt. when mandible moved from C.R. to canine to canine relation and 6.10mm for the Lt. and 6.30mm for the Rt. when mandible moved from C.R. to 7.5mm. 3. The sagittal condylar guidance angle on balancing side during mandibular lateral movements was $45.96^{\circ}$ for the Lt. and $43.22^{\circ}$ for the Rt. when mandible moved from C.R. from canine to canine relation and $41.14^{\circ}$ for the Lt. and $39.77^{\circ}$ for the Rt. when mandible moved from C.R. to 7.5mm. 4. The height of glenoid fossa was 8.23mm for the Lt. and 7.80mm for the Rt. and the angle of posterior slope of articular eminence was $38.30^{\circ}$ for the Lt. and $38.79^{\circ}$ for the Rt. by method-A and $55.61^{\circ}$ for the Lt. and $55.64^{\circ}$ for the Rt. by method-B. 5. The sequence of the frequency of condylar movement patterns on balancing side during mandibular lateral movement were concave type(30 cases), convex type(16 cases), reverse S shape curve(9 cases) and S shape curve(5 cases) when mandible moved from C.R. to canine to canine relation and concave type(27 cases), 5 shape curve(13 cases), convex type(11 cases) and reverse S shape curve(9 cases) when mandible moved from C.R. to 7.5mm.

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Balancing Loads on SONET Rings without Demand Splitting

  • Lee, Chae-Y.;Chang, Seon-G.
    • 대한산업공학회지
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    • 제22권2호
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    • pp.303-311
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    • 1996
  • The Self Healing Ring (SHR) is one of the most Intriguing schemes which provide survivability for telecommunication networks. To design a cost effective SONET ring it is necessary to consider load balancing problems by which the link capacity is determined. The load balancing problem in SONET ring when demand splitting is not allowed is considered in this paper. An efficient algorithm is presented which provides the best solution starting from various Initial solutions. The initial solution is obtained by routing ell demands such that no demands pass through an are In the ring. The proposed algorithm iteratively improves the Initial solution by examining each demand and selecting the maximum load are in its path. The demand whose maximum arc load is biggest is selected to be routed in opposite direction. Computational results show that the proposed algorithm is excellent both in the solution quality and in the computational time requirement. The average error bound of the algorithm is 0.11% of the optimum and compared to dual-ascent approach which has good computational results than other heuristics.

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Edge-Node Deployed Routing Strategies for Load Balancing in Optical Burst Switched Networks

  • Barradas, Alvaro L.;Medeiros, Maria Do Carmo R.
    • ETRI Journal
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    • 제31권1호
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    • pp.31-41
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    • 2009
  • Optical burst switching is a promising switching paradigm for the next IP-over-optical network backbones. However, its burst loss performance is greatly affected by burst contention. Several methods have been proposed to address this problem, some of them requiring the network to be flooded by frequent state dissemination signaling messages. In this work, we present a traffic engineering approach for path selection with the objective of minimizing contention using only topological information. The main idea is to balance the traffic across the network to reduce congestion without incurring link state dissemination protocol penalties. We propose and evaluate two path selection strategies that clearly outperform shortest path routing. The proposed path selection strategies can be used in combination with other contention resolution methods to achieve higher levels of performance and support the network reaching stability when it is pushed under stringent working conditions. Results show that the network connectivity is an important parameter to consider.

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