• Transactions on Electrical and Electronic Materials
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• v.1 no.3
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• pp.23-28
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• 2000

A block-oxide layer was formed on the surface of Cu-based leadframe by chamical oxidation method in order to enhance the adhesion strength between Cu-based leadframe and epoxy molding compound (EMC) Using sandwiched double cantilever beam (SDCB) specimens, the adesion strength was measured in terms of interfacial fracture toughness, G$\sub$IC//Results showed that the black-oxide layer was composed of two kinds of layers: pebble-like Cu$_2$O layer and acicular CuO layer, At the initial stage of oxidation the Cu$_2$O layer was preferentially formed and thickened up to around 200 nm whithin 1 minute of the oxidation time. Then the CuO layer started to from atop of the Cu$_2$O layer and thickened up to around 1300 nm until 20 minutes. As soon as the CuO layer formed, the thickness of Cu$_2$O layer began to reduce and finally reached to around 150 nm. The pre-cleaned and the Cu$_2$O coated leadframes showed almost no adhesion of EMC, however, as the CuO precipitates appeared and became continuous, G$\sub$IC/ increased up to around 80 J/㎡. Further oxidation raised G$\sub$IC/ up. to around 100 J/㎡.

• 한국정보디스플레이학회:학술대회논문집
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• 2007.08a
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• pp.875-877
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• 2007

Zinc tin oxide (ZTO) sol-gel solution was synthesized for ink-jet printable semiconducting ink. Bottom-contact type TFT was produced by printing the ZTO layer between the source and drain electrodes. The transistor involving the ink-jet printed ZTO had the $mobility\;{\sim}\;0.01\;cm^2V^{-1}s^{-1}$. We demonstrated the direct-writing of semiconducting oxide for solution processed TFT fabrication.

• Proceedings of the Korean Vacuum Society Conference
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• 2013.08a
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• pp.287.2-287.2
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• 2013

We synthesized a new composite of poly sodium 4-styrenesulfonate intercalated graphene oxide for energy storage devices by controlling oxidation time in the synthesis of graphite oxide. Specific capacitance was improved from 20 F/g of the previous composites to 88 F/g of the new composite at the current density of 0.3 A/g. The capacitance retention was 94% after 3000 cycles, indicating that the new composites of high cyclic stability, prominent performance as electric double layer capacitor, and even low resistance could be an excellent carbon based electrode for further energy storage devices.

• Korean Journal of Materials Research
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• v.3 no.4
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• pp.352-360
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• 1993

A nitride layer was df'posited on the thermal oxide layer by LPCVD process. ONO(oxidenitricle oxide) capacitors with various thickness of component layer wore fabricated by wet reoxidation of the nitride with and without anrwalmg treatment and their properties were investigated. As a result of observation on the refrative index and etching behavior of the ONO fIlms, the nitride layer OF 40 A thick ness was not so dense that the bottom oxide during the reoxidation process and the capability of securing the capacitance decreased. The conduction current in the ONO multl-Iayer dielctric film was reduced as the bottom(or top) oxide layer became thicker. However, in the case of oxide with thickness more than 50A, it merely plays a factor of reduction in capacitance, and the effect of barrier for hole injection was not so much increased. Annealing of the nitride laypr bpfore reoxidation did not show a grpat effects on the refractive index and capacitance of the film, however, the annealing process increased the breakdown voltage by 2${\cdot}$V.

• Journal of the Korea Academia-Industrial cooperation Society
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• v.10 no.7
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• pp.1489-1496
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• 2009

Amorphous indium-gallium-zinc-oxide thin-film-transistors (TFTs) were modeled successfully. Dependence of TFT characteristics on structure, thickness, and equilibrium electron-density of the active layer was studied. For mono-active-layer TFTs, a thinner active layer had higher field-effect mobility. Threshold voltage showed the smallest absolute value for the 20 nm active-layer. Subthreshold swing showed almost no dependence on active-layer thickness. For the double-active-layer case, better switching performances were obtained for TFTs with bottom active layers with higher equilibrium electron density. TFTs with thinner active layers had higher mobility. Threshold voltage shifted in the minus direction as a function of the increase in the thickness of the layer with higher equilibrium electron-density. Subthreshold swing showed almost no dependence on active-layer structure. These data will be useful in optimizing the structure, the thickness, and the doping ratio of the active layers of oxide-semiconductor TFTs.

• Korean Journal of Materials Research
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• v.11 no.4
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• pp.329-334
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• 2001

Microstructures of barrier-type oxide layers on aluminum was studied by XRD, TEM and RBS. Fer formation of oxide layer. aluminum was anodized in a boric acid solution. The thickness of the oxide film subjected to applied voltage increased linearly at ratio of 1.54nm/V. For oxide layer anodized at 300V, amorphous structure of oxide layer was not transformed after heat treatment at 50$0^{\circ}C$ , while for oxide layers anodized at higher voltages the amorphous structure crystallized into a ${\gamma}$-alumina without any heat treatment. It was also found that the amorphous structure of oxide layer formed at 100V transformed into crystalline structure by electron irradiation. The structure was identified as ${\gamma}$-alumina.

• Transactions on Electrical and Electronic Materials
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• v.11 no.6
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• pp.253-256
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• 2010

Different active layer thicknesses for zinc oxide (ZnO) bottom-contact thin-film transistors (TFTs) were fabricated with a poly-4-vinyphenol polymeric dielectric using injector type atomic layer deposition. The properties of the ZnO TFTs were influenced by the active thickness and width-to-length (W/L) ratio of the device. The threshold voltage of ZnO TFTs shifted positively as the active layer thickness decreased, while the subthreshold slope decreased. The W/L ratio of ZnO TFTs also affected the mobility and subthreshold slope. An optimized TFT structure exhibited an on-tooff current ratio of above 106 with solid saturation.

• Proceedings of the Korean Institute of Electrical and Electronic Material Engineers Conference
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• 2008.11a
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• pp.119-119
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• 2008

The electrical characteristics of Metal-Ferroelectric-Nitride-Oxide-Silicon (MFNOS) structure is studied and compared to the conventional Silicon-Oixde-Nitride-Oxide-Silicon (SONOS) capacitor. The ferroelectric blocking layer is SrBiNbO (SBN with Sr/Bi ratio 1-x/2+x) with the thickness of 200 nm and is fabricated by the RF sputter. The memory windows of MFNOS and SONOS capacitors with sweep voltage from +10 V to -10 V are 6.9 V and 5.9 V, respectively. The effect of ferroelectric blocking layer and charge trapping on the memory window was discussed. The retention of MFNOS capacitor also shows the 10-years and longer retention time than that of the SONOS capacitor. The better retention properties of the MFNOS capacitor may be attributed to the charge holding effect by the polarization of ferroelectric layer.

• Proceedings of the Korean Vacuum Society Conference
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• 2014.02a
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• pp.316-316
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• 2014

Two different transparent conducting oxide (TCO) layers of Al-doped ZnO (AZO) and $WO_3$ were prepared by a rf sputtering process. Working pressure, deposition time, and target-to-substrate distance were varied for the sputtering process to improve electrical properties of the resulting layer. Thickness of the TCO layers was measured by a profile meter of ${\alpha}$-step. To evaluate the electrical conductivity, surface resistivity of the TCO layers was measured by a four-point probe technique. Decrease of the working pressure resulted in increase of deposition rate and decrease of surface resistivity of the resulting layer. Increase of the layer thickness due to increased deposition time resulted in decrease of surface resistivity of the resulting layer. The shorter the target-to-substrate distance was, the lower was the surface resistivity of the resulting layer.

• Journal of the Korean Institute of Telematics and Electronics D
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• v.34D no.6
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• pp.43-49
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• 1997

Tungsten poycide has studied gate oxide reliability and dielectric strength charactristics as the composition of gate electrode which applied submicron on CMOS and MOS device for optimizing gate electrode resistivity. The gate oxide reliability has been tested using the TDDB(time dependent dielectric breakdwon) and SCTDDB (stepped current TDDB) and corelation between polysilicon and WSi$_{2}$ layer. iN the case of high intrinsic reliability and good breakdown chracteristics on polysilicon, confirmed that tungsten polycide layer is a better reliabilify properities than polysilicon layer. Also, hole trap is detected on the polysilicon structure meanwhile electron trap is detected on polycide structure. In the case of electron trap, the WSi$_{2}$ layer is larger interface trap genration than polysilicon on large POCL$_{3}$ doping time and high POCL$_{3}$ doping temperature condition. WSi$_{2}$ layer's leakage current is less than 1 order and dielectric strength is a larger than 2MV/cm.