• 한국통신학회논문지
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• 제37A권10호
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• pp.841-849
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• 2012

본 논문은 max-log 근사화 하에서 연판정 최대 우도 (soft-output maximum-likelihood, soft-ML) 성능을 달성하기 위한 저복잡도 연판정 다중 안테나 (soft-output multiple-input multiple-output, soft-MIMO) 검출 알고리즘을 제안한다. 제안된 알고리즘은 병렬 트리-탐색 (parallel tree-search, PTS)을 기반으로 하며, 정렬 순서를 변경한 정렬된 QR 분해 (sorted-QR decomposition, SQRD)를 채널 순서화를 위해 적용한다. 비트별 로그-우도비 (log-likelihood ratio, LLR)를 계산하는 과정에서 발생할 수 있는 공집합 문제 (empty-set problem)는 탐색 레벨별로 추가적인 노드들을 삽입함으로써 해결한다. 제안된 노드 삽입 기법에서는 선택된 노드와 반대 비트 값을 가지면서 가장 가까운 노드만 삽입되기 때문에, 연산 복잡도 측면에서 상당히 효율적이다. 제안된 알고리즘의 연산 복잡도는 기존 알고리즘 대비 약 37-74% 수준이며, $4{\times}4$ 시스템에 대한 시뮬레이션 결과, 제안된 알고리즘은 soft-ML와 비교하여 0.1 dB 미만의 성능 저하를 보였다.

• KSII Transactions on Internet and Information Systems (TIIS)
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• 제13권2호
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• pp.635-656
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• 2019

In this paper, we investigate the degrees of freedom (DoF) of a multi-cell multi-user multiple-input multiple-output (MIMO) interference broadcast channel (IBC) with non-cooperation distributed base stations (BS), where each BS serves users of its corresponding cell. When all BSs simultaneously transmit their own signals over the same frequency band in the MIMO IBC, the edge users in each cell will suffer the inter-cell interference (ICI) and inter-user interference (IUI) signals. In order to eliminate the ICI and IUI signals, a distributed space time interference alignment (DSTIA) approach is proposed where each BS has only limited access to distributed moderately-delay channel state information at the transmitter (CSIT). It is shown that the DSTIA scheme can obtain the appreciate DoF gains. In addition, the DoF upper bound is asymptotically achievable as the number of antenna at each BS increases. It is shown that the DSTIA method can get DoF gains over other interference alignment schemes with delayed CSIT in literature. Moreover, the DSTIA method can attain higher DoFs than the IA schemes with global CSIT for certain antenna configurations.

• Journal of Information Processing Systems
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• 제13권5호
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• pp.1071-1088
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• 2017

For dual-hop multiple-input multiple-output (MIMO) decode-and-forward relaying systems, we propose a selective relaying scheme that uses orthogonal space-time block code (OSTBC) and transmit antenna selection with maximal-ratio combining (TAS/MRC) or vice versa at the first and second hops, respectively. The aim is to achieve an asymptotically identical performance to the dual-hop relaying system with only TAS/MRC, while requiring lower feedback overhead. In particular, we give the selection criteria based on the antenna configurations and the average channel powers for the first and second hops, assuming Rayleigh fading channels. Also, the numerical results are shown for the outage performance comparison between the dual-hop DF relaying systems with the proposed scheme, only TAS/MRC, and only OSTBC.

• 한국정보전자통신기술학회논문지
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• 제13권2호
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• pp.95-101
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• 2020

In this paper, we consider a group testing (GT) framework which is to find a set of defective samples out of a large number of samples. To handle this framework, we propose a maximum product detection algorithm (MPDA) which is based on maximum a posteriori probability (MAP). The key idea of this algorithm exploits iterative detection to propagate belief to neighbor samples by exchanging marginal probabilities between samples and output results. The belief propagation algorithm as a conventional approach has been used to detect defective samples, but it has computational complexity to obtain the marginal probability in the output nodes which combine other marginal probabilities from the sample nodes. We show that the our proposed MPDA provides a benefit to reduce computational complexity up to 12% in runtime, while its performance is only slightly degraded compared to the belief propagation algorithm. And we verify the simulations to compare the difference of performance.

• 한국정보통신학회논문지
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• 제3권2호
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• pp.455-463
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• 1999

This study is on the development of an engine monitoring system which can be applied not only for mid-size vessels but also small vessels less than 20 gross tonnage. Monitoring system consists of a set LMU(Local Monitoring Unit) that collect data from local machinery, a host computer that controls LMU and a stable communication system which adopts CSMA/CD protocol. The LMU is composed of 80C196KC microprocessor, which consists of CPU, digital input/output, analog input/output and communication module. Communication system between the host computer(compatible IBM PC) and LMUs is the multidrop configuration using RS-485 method and confirmed high performance communication by the aid of polling method as well as carrier sense multiple access with collision detection(CSMA/CD) protocol.

• 정보학연구
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• 제10권3호
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• pp.33-45
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• 2007

Systolic Array Processor is used for designing the special purpose processor in Digital Signal Processing, Computer Graphics, Neural Network Applications etc., since it has the characteristic of parallelism, pipeline processing and architecture of regularity. But, in case of using general design method, it has intial waiting period as large as No. of PE-1. And if the connected system needs parallel and simultaneous outputs, processor has some problems of the performance, since it generates only one output at each clock in output state. So in this paper, one dimensional Systolic Array Processor that is designed according to the dependance of data and operations using the partitioned sub-matrix is proposed for the purpose of improving the performance. 1-D Systolic Array using 4 partitioned sub-matrix has efficient method in case of considering those two problems.

• 한국정보통신학회:학술대회논문집
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• 한국해양정보통신학회 1999년도 춘계종합학술대회
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• pp.142-145
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• 1999

본 논문에서는 이중 평면 패킷 스위치 구조를 가지는 이중 입력 /이중 스위칭 평면 구조(DQDP) 평면 선택 능력을 가진 DQDP(DQDP-PS) 구조, 출력 그룹 큐잉 능력을 가진 DQDP(DQDP-OGQ) 구조에 대한 지연 성능 분석을 연구하였다. 성능 분석을 통하여 랜덤 트래픽하에서는 거의 동일한 성능을 보이지만 버스트 트래픽 환경에서는 DQDP-PS와 DQDP-OGO 스위치만이 이상적인 출력 버퍼 패킷 스위치의 성능에 가까운 지연 특성을 얻을 수 있었다.

• Journal of information and communication convergence engineering
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• 제7권1호
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• pp.62-65
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• 2009

In this paper, the temperature characteristics of full CMOS FLL(frequency locked loop) re analyzed. The FLL circuit is used to generate an output signal that tracks an input efference signal. The locking time of FLL is short compared to PLL(phase locked loop) circuit because the output signal of FLL is synchronized only in frequency. Also the FLL s designed to allow the circuit to be fully integrated. The FLL circuit is composed two VCs, two buffers, a VCO and two frequency dividers. The temperature variation of frequency divider, FVC and buffer cancelled because the circuit structure. is the same and he temperature effect is cancelled by the comparator. Simulation results are shown to illustrate the performance of the designed FLL circuit with temperature.

• 제어로봇시스템학회:학술대회논문집
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• 제어로봇시스템학회 2002년도 ICCAS
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• pp.79.6-79
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• 2002

We propose here sequential 2 methods for obtain information of current or potential data for power transmission line. One is a digital data transmission unit, this is, an output of a current sensor of power transmission line is digitalized by use of an easy asynchronous protocol. The unit has high speed transform rate, easy making header caused of consisting of only logic circuit. The other is, the output of the unit is transformed via LAN interface and displayed on a personal computer. We have confirmed remote measuring using the method for 100A and 240 A of the current information of power transmission line. Therefore we will be able to see a current waveform by use of internet at a cheep c...

• 대한안전경영과학회지
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• 제16권4호
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• pp.359-369
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• 2014

Due to the severe market conditions, pre-entrepreneur seeks to start their business through franchise company. This paper, using the data envelopment analysis(DEA) method, examines efficiency of a group of franchise company in order to provide efficiency information with pre-entrepreneur. Output-oriented DEA model is applied in the investigation of efficiency, and the overall efficiency score is decomposed into pure technical efficiency and scale efficiency. The input variables selected to evaluate the efficiency are franchise deposit, franchise contribution cost and the output variables are sales and number of franchises, and length of business. The results of this paper show franchise industry have the low level of overall efficiency and the main sources of inefficiency is found technical rather than scale. As a result, this paper provides not only the current status of efficiency information of a franchise with pre-entrepreneur but also give warning when they sign-up with franchise business.