• 제목/요약/키워드: output passive filter

검색결과 41건 처리시간 0.039초

고조파 필터 및 인버터의 용량을 고려한 분산전원 시스템의 역률 제어에 관한 연구 (A Study on Power Factor Control of Inverter-based DG System with Considering the Capacity of an Active Harmonic Filter and an Inverter)

  • 김영진;황평익;문승일
    • 전기학회논문지
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    • 제58권11호
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    • pp.2149-2154
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    • 2009
  • Electric power quality in power transmission/distribution systems has considerably been deteriorated with the increase in the capacity of distributed generators (DGs). It is because inverters, connecting DGs to conventional power grids, tend to generate harmonic current and voltage. For harmonic mitigation, a large amount of research has been done on passive and active filters, which have been operating successfully in many countries. This paper, therefore, presents how to adopt the filters to an inverter-based DG, with considering a system consisting of both inverter-based DG and harmonic filters. In particular, this paper describes the simulation results using the PSCAD/EMTDC: firstly, the relationship between total harmonic distortion(THD) of current and output power of DG: secondly, the harmonic mitigation ability of passive and active filters. The system, furthermore, is obliged to satisfy the regulations made by Korean Electric Power Corporation(KEPCO). In the regulations, power factor should be maintained between 0.9 and 1 in a grid-connected mode. Thus, this paper suggests two methods for the system to control its power factor. First, the inverter of DG should control power factor rather than an active filter because it brings dramatic decrease in the capacity of the active filter. Second, DG should absorb reactive power only in the range of low output power in order to prevent useless capacity increase of the inverter. This method is expected to result in the variable power factor of the system according to its output power.

전동기 친화형 출력필터를 이용한 영구자석 동기전동기의 센서리스 구동 성능 향상 (Performance Improvement of Sensorless PMSM Drives using Motor Friendly Output Filter)

  • 부한영;백승훈;한상훈;조영훈
    • 전력전자학회논문지
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    • 제25권4호
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    • pp.329-332
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    • 2020
  • A back-electromotive force (back-EMF) estimator for a permanent magnet synchronous motor (PMSM) uses the three-phase voltage references of a current controller to estimate rotor position. However, owing to voltage drops caused by the nonlinear characteristics of switches and passive components, the actual voltage in the motor and the three-phase voltage reference may not match. This study proposes a sensorless control method using a sine-wave output filter applied between the motor drive system and PMSM. The precise voltage in the motor can be measured with the sine-wave output filter and applied to the input of the estimator. Moreover, given that the voltage in the motor can be measured precisely at extremely low speeds, the stable operation range of the back-EMF estimator can be secured. Experimental results show that the proposed sensorless control method has stable operation at extremely low speeds compared with conventional sensorless control.

Sinusoidal, Pulse, Triangular Oscillator Using Second Generation Current Conveyor

  • Choi, Jin-Ho
    • Journal of information and communication convergence engineering
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    • 제8권5호
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    • pp.566-569
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    • 2010
  • This paper describes the sinusoidal, pulse, triangular oscillator using second generation current conveyor. To obtain the sinusoidal waveform the circuit blocks are constructed by using all pass filter and integrator. The pulse and the triangular waveforms are obtained from the output of sinusoidal oscillator. The peak-to-peak voltages of sinusoidal and triangular waveforms can be easily controlled by the dc offset voltage. Also the output frequency of the oscillator can be controlled by varying passive elements. The designed circuit is verified by HSPICE simulation.

MATHEMATICAL PHASE NOISE MODEL FOR A PHASE-LOCKED-LOOP

  • Limkumnerd, Sethapong;Eungdamrong, Duangrat
    • 제어로봇시스템학회:학술대회논문집
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    • 제어로봇시스템학회 2005년도 ICCAS
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    • pp.233-236
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    • 2005
  • Phase noise in a phase-locked-loop (PLL) is unwanted and unavoidable. It is a main concern in oscillation system especially PLL. The phase noise is derived in term of power spectrum density by using a reliable phase noise model. There are four noise sources being considered in this paper, which are generated by reference oscillator, voltage controlled oscillator, filter, and main divider. The major concern for this paper is the noise from the filter. Two types of second order low pass filter are used in the PLL system. Applying the mathematical phase noise model, the output noises are compared. The total noise from the passive filter is lower than the active filter at the offset frequency range between 1 Hz to 33 kHz.

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Characterization and Performance Evaluation of Advanced Aircraft Electric Power Systems

  • Eid, Ahmad;El-Kishky, Hassan;Abdel-Salam, Mazen;El-Mohandes, Mohamed T.
    • Journal of Power Electronics
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    • 제10권5호
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    • pp.563-571
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    • 2010
  • A model of an advanced aircraft electric power system is developed and studied under variable-speed constant-frequency (VSCF) operation. The frequency of the generator's output voltage is varied from 400-Hz to 800-Hz for different loading scenarios. Power conversions are obtained using 12-pulse power converters. To reduce the harmonic contents of the generator output waveforms, two high-pass passive filters are designed and installed one at a time at the generator terminals. The performance of the two passive filters is compared according to their losses and effectiveness. The power quality characteristics of the studied VSCF aircraft electric power system are presented and the effectiveness of the proposed filter is demonstrated through compliance with the newly published aircraft electrical standards MIL-STD-704F.

신호감지회로를 가진 극소형 위상고정루프 (An Ultra Small Size Phase Locked Loop with a Signal Sensing Circuit)

  • 박경석;최영식
    • 한국정보전자통신기술학회논문지
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    • 제14권6호
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    • pp.479-486
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    • 2021
  • 본 논문에서는 신호감지회로(Signal Sensing Circuit : SSC)를 추가하여 2개의 루프로 구성된 단일 커패시터 루프필터를 가진 극소형 위상고정루프(Phase Locked Loop : PLL)를 제안하였다. 위상고정루프 크기를 극단적으로 줄이기 위하여 가장 많은 면적을 차지하는 수동소자 루프필터를 극소형 단일 커패시터(2pF)로 설계하였다. 신호감지회로가 포함된 내부 부궤환 루프 출력이 외부 부궤환 루프의 단일 커패시터 루프필터 출력에 부궤환 역할을 하여 제안한 극소형 위상고정루프가 안정적으로 동작하도록 설계하였다. 위상고정루프 출력 신호 변화를 감지하는 신호 감지 회로는 루프필터의 커패시턴스 전하량을 조절하여 위상고정루프 출력 주파수의 초과 위상변이를 줄였다. 제안된 구조는 기존 구조에 비해 1/78 정도의 작은 커패시터를 가짐에도 불구하고 지터 크기는 10% 정도 차이가 난다. 본 논문의 위상고정루프는 1.8V 180nm 공정을 사용하였고, Spice를 통해 안정하게 동작하는 시뮬레이션 결과를 보여주었다.

단상 PVPCS 출력 전류의 리플 개선을 위한 노치 필터 및 피드 포워드 제어기 설계 (The Feed-forward Controller and Notch Filter Design of Single-Phase Photovoltaic Power Conditioning System for Current Ripple Mitigation)

  • 김승민;양승대;최주엽;최익;이영권
    • 한국태양에너지학회:학술대회논문집
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    • 한국태양에너지학회 2012년도 춘계학술발표대회 논문집
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    • pp.325-330
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    • 2012
  • A single-phase PVPCS(photovoltaic power conditioning system) that contains a single phase dc-ac inverter tends to draw an ac ripple current at twice the out frequency. Such a ripple current may shorten passive elements life span and worsen output current THD. As a result, it may reduce the efficiency of the whole PVPCS system. In this paper, the ripple current propagation is analyzed, and two methods to reduce the ripple current are proposed. Firslyt, this paper presents notch filter with IP voltage controller to reject specific current ripple in single-phase PVPCS. The notch filter can be designed that suppress just only specific frequency component and no phase delay. The proposed notch filter can suppress output command signal in the ripple bandwidth for reducing output current THD. Secondly, for reducing specific current ripple, the other method is feed-forward compensation to incorporate a current control loop in the dc-dc converter. The proposed notch filter and feed-forward compensation method have been verified with computer simulation and simulation results obtained demonstrate the validity of the proposed control scheme.

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Comparison and Study of Active and Hybrid Power Filters for Compensation of Grid Harmonics

  • Gutierrez, Bryan;Kwak, Sang-Shin
    • Journal of Power Electronics
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    • 제16권4호
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    • pp.1541-1550
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    • 2016
  • This paper presents a theoretical analysis and comparisons of active power filter (APF) and hybrid power filter (HPF) systems, given terminal constraints of harmonic compensations in nonlinear loads. Despite numerous publications for the two types of filters, the features and differences between them have not been clearly explained. This paper presents a detailed analysis of the operations of a HPF inverter along with those of passive power filters (PPFs). It also includes their effects on the power factor at the grid. In addition, a theoretical analysis and a systematic comparison between the APF and HPF systems are addressed based on system parameters such as the source voltage, output power, reactive component size, and power factor at the grid terminals. The converter kVA ratings and dc-link voltage requirements for both topologies are considered in the presented comparisons

5[kVA]급 3상 능동전력필터를 위한 저가형 제어기 설계 (Design of Low Cost Controller for 5[kVA] 3-Phase Active Power Filter)

  • 이승요;채영민;최해룡;신우석;최규하
    • 전력전자학회논문지
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    • 제4권1호
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    • pp.26-34
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    • 1999
  • 비선형 반도체 전력변화장치의 사용이 급증함에 따라 전원 측에 발생되는 고조파 및 무효전력을 보상하기 위한 능동전력필터에 관한 연구가 많이 이루어져 왔으며 실용화를 위한 노력이 계속 되고 있다. 그러나 수동필터 대비 능동전력필터의 가격이 아직까지는 고가이기 때문에 이의 상용화가 더디게 진전되고 있는 추세이며, 특히 소·중용량의 능동전력필터의 제어를 위하여 디지털 신호 처리용 프로세서인 DSP(digital signal processor)를 사용하는 경우 아직까지 그 가격이 고가이기 때문에 능동필터의 제어가격을 상승시키는 요인으로 작용한다. 한편 능동전력필터의 가격을 낮추기 위해 아날로그 제어기만을 도입하는 경우 제어회로가 너무 복잡해 지고 제어의 유연성이 떨어지는 단점을 수반하게 된다. 본 논문에서는 3상 5[kVA]급 농동전력필터의 저가형 제어기를 구현하기 위해 저가의 원칩 마이크로프로세서인 80C196KC를 사용하영 디지털 제어부를 구성하며 이를 통해 보상전류 성분의 계산 및 직류단 일정 전압제어를 수행하고, 능동필터 시스템의 전류제어를 위하여 아날로글 형태의 제어기인 히스테리시스 제어기를 함께 사용한다. 컴퓨터 시뮬레이션을 통해서 보상 시스템의 특성을 해석하였으며 실험에 의해 능동전력필터의 저가화를 위해 설계된 제어기가 고조파 및 무효전력 보상을 충실히 수행함을 확인하였다.

H-Bridge 7레벨 인버터를 이용한 유도전동기 구동시스템의 노이즈 저감을 위한 출력 필터설계 (Output Filler Design for Noise Reduction of Induction Motor Drive System using H-Bridge 7-Level Inverters)

  • 김수홍;안영오;김윤호;방상석;김광섭
    • 조명전기설비학회논문지
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    • 제20권3호
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    • pp.36-44
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    • 2006
  • 일반적으로 PWM인버터에 발생된 고조파와 노이즈는 스위칭 주파수, dv/dt와 di/dt, PWM 스위칭 방법에 의해 영향을 받는다. 멀티레벨 인버터가 고전력 시스템에 적용되어 낮은 주파수에서 동작할 때 이것은 큰 고조파 성분과 노이즈를 발생하게 된다. 따라서 멀티레벨 인버터에 출력 필터가 요구된다. 본 논문에서는 H-bridge 7레벨 인버터 시스템을 사용한 3상 유도 전동기 구동 시스템의 고조파와 노이즈 감소를 위해 출력 필터를 설계하였다. 가격이 저렴하고 간단한 구조를 가지며, 고조파와 노이즈를 효과적으로 감소시킬 수 있는 수동필터는 멀티레벨 인버터 시스템을 사용한 3상 유도전동기 구동시스템에 적용되었다. 설계된 시스템은 향상되었고, 시뮬레이션과 실험을 통해 그 타당성을 증명하였다.