• Title/Summary/Keyword: output delay

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Design and Performance Evaluation of a 3-Dimensional Nonblocking Copy Network for Multicast ATM Switches (ATM 멀티캐스트 스위치를 위한 3차원 논블럭킹 복사망의 설계 및 성능평가)

  • 신재구;손유익
    • Journal of KIISE:Information Networking
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    • v.29 no.6
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    • pp.696-705
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    • 2002
  • This paper presents a new copy network for multicast ATM switches. Many studies have been carried out up to date since the proposition of Lee's copy network. However, the overflows and cell conflicts within the switch have still been raised a problem in argument. In order to reduce those problems, we proposed a 3-dimensional multicast switching architecture which has shared buffers in this paper. The proposed architecture can reduce the overflows and cell conflicts through multiple paths and output ports even in the high load environments. Also, we proposed a cell splitting algorithm which handles the cell in the case of large fan-out, and a copy network to increase throughput by expanding the Lee's Broadcast Banyan Network(BBN). Cell copy uses the Boolean interval splitting algorithm and the multicast pattern of the cells according to the self-routing characteristics of the network. In the proposed copy network, we improve the problems such as overflow, cell splitting of large fanout, cell conflicts, etc., which were still existed in the Lee's network. The results of performance evaluation by computer simulation show that the proposed scheme has better throughput, cell loss rate and cell delay than the conventional method.

A Study on Correlation Processing Method of Multi-Polarization Observation Data by Daejeon Correlator (대전상관기의 다중편파 관측데이터 상관처리 방법에 관한 연구)

  • Oh, Se-Jin;Yeom, Jae-Hwan;Roh, Duk-Gyoo;Jung, Dong-Kyu;Hwang, Ju-Yeon;Oh, Chungsik;Kim, Hyo-Ryoung
    • Journal of the Institute of Convergence Signal Processing
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    • v.19 no.2
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    • pp.68-76
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    • 2018
  • In this paper, we describe the correlation processing method of multi-polarization observation data of the Daejeon Correlator. VLBI observations include single or multiple polarized observations depending on the type of object. Polarization observations are performed to observe the characteristics of the object. During the observations of the celestial object, polarization measurements are also performed to determine the delay values and causes of changes in the object. Correlation processing of polarization observation data of the Daejeon correlator is proposed by OCTAVIA of a synchronous reproduction processing apparatus that outputs data input to each antenna unit by using an output bit selection function to convert bits and the order of the data streams is changed, And the input of the Daejeon correlator is configured to perform the polarization correlation processing by conducting correlation processing by setting the existing stream number to be the same. Correlation processing is conducted on the test data observed for the polarization correlation processing and it is verified through experiments that the polarization correlation processing method of the proposed Daejeon correlator is effective.

A Novel High-speed CMOS Level-Up/Down Shifter Design for Dynamic-Voltage/Frequency-Scaling Algorithm (Dynamic-Voltage/Frequency-Scaling 알고리즘에서의 다중 인가 전압 조절 시스템 용 High-speed CMOS Level-Up/Down Shifter)

  • Lim Ji-Hoon;Ha Jong-Chan;Wee Jae-Kyung;Moon Gyu
    • Journal of the Institute of Electronics Engineers of Korea SD
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    • v.43 no.6 s.348
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    • pp.9-17
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    • 2006
  • We proposed a new High-speed CMOS Level Up/Down Shifter circuits that can be used with Dynamic Voltage and Frequency Scaling(DVFS) algorithm, for low power system in the SoC(System-on-Chip). This circuit used to interface between the other voltage levels in each CMOS circuit boundary, or between multiple core voltage levels in a system bus. Proposed circuit have advantage that decrease speed attenuation and duty ratio distortion problems for interface. The level up/down shifter of the proposed circuit designed that operated from multi core voltages$(0.6\sim1.6V)$ to used voltage level for each IP at the 500MHz input frequency The proposed circuit supports level up shifting from the input voltage levels, that are standard I/O voltages 1.8V, 2.5V, 3.3V, to multiple core voltage levels in between of $0.6V\sim1.6V$, that are used internally in the system. And level down shifter reverse operated at 1Ghz input frequency for same condition. Simulations results are shown to verify the proposed function by Hspice simulation, with $0.6V\sim1.6V$ CMOS Process, $0.13{\mu}m$ IBM CMOS Process and $0.65{\mu}m$ CMOS model parameters. Moreover, it is researched delay time, power dissipation and duty ration distortion of the output voltage witch is proportional to the operating frequency for the proposed circuit.

Analysis of Input/Output Transfer Characteristic to Transmit Modulated Signals through a Dynamic Frequency Divider (동적 주파수 분할기의 변조신호 전송 조건을 위한 입출력 전달 특성 분석과 설계에 대한 연구)

  • Ryu, Sungheon;Park, Youngcheol
    • The Journal of Korean Institute of Electromagnetic Engineering and Science
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    • v.27 no.2
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    • pp.170-175
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    • 2016
  • In order to transmit baseband signals through frequency dividing devices, we studied the transfer function of the device in the term of the baseband signal distortion. From the analysis, it is shown that the magnitude of the envelope signal is related to the mixer gain and the insertion loss of the low pass filter whilst the phase is the additional function with the 1/2 of the phase delay. For the purpose of the verification of the study, we designed a dynamic frequency divider at 1,400 MHz. The operating frequency range of the device is closely related to the conversion gain of mixers and the amplitude of input signal, and becomes wide as the conversion gain of mixers increases. The designed frequency divider operates between 0.9 GHz and 3.2 GHz, for -14.5 dBm input power. The circuit shows 20 mW power dissipation at $V_{DD}=2.5V$, and the simulation result shows that an amplitude modulated signal at 1,400 MHz with the modulation index of 0.9 was successfully downconverted to 700 MHz.

Prediction of Evacuation Time for Emergency Planning Zone of Uljin Nuclear Site (울진원전 방사선비상계획구역에 대한 소개시간 예측)

  • Jeon, In-Young;Lee, Jai-Ki
    • Journal of Radiation Protection and Research
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    • v.27 no.3
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    • pp.189-198
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    • 2002
  • The time for evacuation of residents in emergency planning zone(EPZ) of Uljin nuclear site in case of a radiological emergency was estimated with traffic analysis. Evacuees were classified into 4 groups by considering population density, local jurisdictions, and whether they ate residents or transients. The survey to investigate the behavioral characteristics of the residents was made for 200 households and included a hypothetical scenario explaining the accident situation and questions such as dwelling place, time demand for evacuation preparation transportation means for evacuation, sheltering place, and evacuation direction. The microscopic traffic simulation model, CORSIM, was used to simulate the behavior of evacuating vehicles on networks. The results showed that the evacuation time required for total vehicles to move out from EPZ took longer in the daytime than at night in spite that the delay times at intersections were longer at night than in the daytime. This was analyzed due to the differences of the trip generation time distribution. To validate whether the CORSIM model fan appropriately simulate the congested traffic phenomena assumable in case of emergency, a benchmark study was conducted at an intersection without an actuated traffic signal near Uljin site during the traffic peak-time in the morning. This study indicated that the predicted output by the CORSIM model was in good agreement with the observed data. satisfying the purpose of this study.

An Efficient CPLD Technology Mapping considering Area under Time Constraint (시간 제약 조건하에서 면적을 고려한 효율적인 CPLD 기술 매핑)

  • Kim, Jae-Jin;Kim, Hui-Seok
    • Journal of the Institute of Electronics Engineers of Korea SD
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    • v.38 no.1
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    • pp.79-85
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    • 2001
  • In this paper, we propose a new technology mapping algorithm for CPLD consider area under time constraint(TMFCPLD). This technology mapping algorithm detect feedbacks from boolean networks, then variables that have feedback are replaced to temporary variables. Creating the temporary variables transform sequential circuit to combinational circuit. The transformed circuits are represented to DAG. After traversing all nodes in DAG, the nodes that have output edges more than two are replicated and reconstructed to fanout free tree. This method is for reason to reduce area and improve total run time of circuits by TEMPLA proposed previously. Using time constraints and delay time of device, the number of graph partitionable multi-level is decided. Initial cost of each node are the number of OR-terms that it have. Among mappable clusters, clusters of which the number of multi-level is least is selected, and the graph is partitioned. Several nodes in partitioned clusters are merged by collapsing, and are fitted to the number of OR-terms in a given CLB by bin packing. Proposed algorithm have been applied to MCNC logic synthesis benchmark circuits, and have reduced the number of CLBs by 62.2% than those of DDMAP. And reduced the number of CLBs by 17.6% than those of TEMPLA, and reduced the number of CLBs by 4.7% than those of TMCPLD. This results will give much efficiency to technology mapping for CPLDs.

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An Efficient Iterative Decoding Stop Criterion Algorithm using Error Probability Variance Value of Turbo Code (터보부호의 오류확률 분산값을 이용한 효율적인 반복중단 알고리즘)

  • Jeong Dae ho;Shim Byoung sup;Lim Soon Ja;Kim Tae hyung;Kim Hwan yong
    • The Journal of Korean Institute of Communications and Information Sciences
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    • v.29 no.10C
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    • pp.1387-1394
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    • 2004
  • Turbo code, a kind of error correction coding technique, has been used in the field of digital mobile communication systems. And it is well known about the fact that turbo code has better the BER performance as the number of decoding iterations increases in the AWGN channel environment. However, as the number of decoding iterations is increased under the several channel environments, any further iteration results in very little improvement, and it requires much delay, computation and power consumption in proportion to the number of decoding iterations. In this paper, it proposes the efficient iterative decoding stop criterion algorithm which can largely reduce the average number of decoding iterations of turbo code. Through simulations, it is verifying that the proposed algorithm can efficiently stop the iterative decoding by using the variance value of error probability for the soft output value, and can largely reduce the average number of decoding iterations without BER performance degradation. As a result of simulation, the average number of decoding iterations for the proposed algorithm is reduced by about 2.25% ~14.31% and 3.79% ~14.38% respectively compared to conventional schemes, and power consumption is saved in proportion to the number of decoding iterations.

Service Curve Allocation Schemes for High Network Utilization with a Constant Deadline Computation Cost (상수의 데드라인 계산 비용으로 높은 네트웍 유용도를 얻는 서비스 곡선 할당 방식)

  • 편기현;송준화;이흥규
    • Journal of KIISE:Information Networking
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    • v.30 no.4
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    • pp.535-544
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    • 2003
  • Integrated services networks should guarantee end-to-end delay bounds for real-time applications to provide high quality services. A real-time scheduler is installed on all the output ports to provide such guaranteed service. However, scheduling algorithms studied so far have problems with either network utilization or scalability. Here, network utilization indicates how many real-time sessions can be admitted. In this paper, we propose service curve allocation schemes that result in both high network utilization and scalability in a service curve algorithm. In service curve algorithm, an adopted service curve allocation scheme determines both network utilization and scalability. Contrary to the common belief, we have proved that only a part of a service curve is used to compute deadlines, not the entire curve. From this fact, we propose service curve allocation schemes that result in a constant time for computing deadlines. We through a simulation study that our proposed schemes can achieve better network utilizations than Generalized processor Sharing (GPS) algorithms including the multirate algorithm. To our knowledge, the service curve algorithm adopting our schemes can achieve the widest network utilization among existing scheduling algorithms that have the same scalability.

A channel parameter-based weighting method for performance improvement of underwater acoustic communication system using single vector sensor (단일 벡터센서의 수중음향 통신 시스템 성능 향상을 위한 채널 파라미터 기반 가중 방법)

  • Kang-Hoon, Choi;Jee Woong, Choi
    • The Journal of the Acoustical Society of Korea
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    • v.41 no.6
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    • pp.610-620
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    • 2022
  • An acoustic vector sensor can simultaneously receive vector quantities, such as particle velocity and acceleration, as well as acoustic pressure at one location, and thus it can be used as a single input multiple output receiver in underwater acoustic communication systems. On the other hand, vector signals received by a single vector sensor have different channel characteristics due to the azimuth angle between the source and receiver and the difference in propagation angle of multipath in each component, producing different communication performances. In this paper, we propose a channel parameter-based weighting method to improve the performance of an acoustic communication system using a single vector sensor. To verify the proposed method, we used communication data collected from the experiment conducted during the KOREX-17 (Korea Reverberation Experiment). For communication demodulation, block-based time reversal technique which is robust against time-varying channels were utilized. Finally, the communication results showed that the effectiveness of the channel parameter-based weighting method for the underwater communication system using a single vector sensor was verified.

Investigating the Influence of Rate Dependency and Axial Force on the Seismic Performance Evaluation of Isolation Bearing (면진받침의 내진성능평가를 위한 실험 시 속도의존성과 수직하중의 영향)

  • Minseok Park;Yunbyeong Chae;Chul-Young Kim
    • Journal of the Korea institute for structural maintenance and inspection
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    • v.27 no.6
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    • pp.22-29
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    • 2023
  • In the evaluation of seismic performance for structural materials and components, the loading rate and axial force can have a significant impact. Due to time-delay effects between input and output displacements, It is difficult to apply high-rate displacement in cyclic tests and hybrid simulations. Additionally, the difficulty of maintaining a consistent vertical load in the presence of lateral displacement has limited fast and real-time tests performed while maintaining a constant vertical load. In this study, slow, fast cyclic tests and real-time hybrid simulations were conducted to investigate the rate dependency and the influence of vertical loads of Isolation Bearing. In the experiment, the FLB System including an Adaptive Time Series (ATS) compensation and a state estimator was constructed for real-time control of displacement and vertical load. It was found that the vertical load from the superstructure and loading rate can have a significant impact on the strength of the seismic isolation bearing and its behavior during an earthquake. When conducting experiments for seismic performance evaluation, they must be implemented to be similar to reality. This study demonstrates the excellent performance of the system built and used for seismic performance evaluation and enables accurate and efficient seismic performance evaluation.