• 제어로봇시스템학회논문지
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• 제6권5호
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• pp.333-338
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• 2000

This paper considers the decentralized control problem of linear time-invariant interconnected systems with delays. A decentralized output-feedback controller to obtain both stability and performance of the interconnected system is designed using the standard $H_\infty$ control theory, This paper provides sufficient conditions for such a controller to exist and provides an output feedback controller.

• 제어로봇시스템학회:학술대회논문집
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• 제어로봇시스템학회 2000년도 제15차 학술회의논문집
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• pp.271-271
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• 2000

This paper considers guaranteed cost output feedback controller for the uncertain time-varying delay systems with delays in state and control input. The uncertainty in the system is assumed to be norm-bounded and time-varying. The sufficient condition for the existence of controller and the guaranteed cost output feedback controller design method are presented. Also, using some changes of variables and Schur complements, the obtained sufficient condition can be reformulated as LMI forms in terms of transformed variables. Using the obtained LMI variables, we derive guaranteed cost controller gain and guaranteed cost.

• 대한전기학회:학술대회논문집
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• 대한전기학회 2004년도 학술대회 논문집 정보 및 제어부문
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• pp.82-85
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• 2004

This paper proposes the development of delay compensator to minimize performance degradation caused by time delays in network-based real-time control systems. The delay compensator uses the time-stamp method as a direct delay measuring method to measure time delays generated between network nodes. The delay compensator predicts the network time delays of next period in the views point of time delays and minimizes performance degradation from network through considering predicted time delays. Control output considering network time delays is generated by the defuzzification of probable time delays of next period. The time delays considered in the delay compensator are modeled by using a timed Petri net model. The proposed delay prediction mechanism for the delay compensator is evaluated through some simulation tests by measuring deviation of the predicted delays from simulated delays.

• 한국조명전기설비학회:학술대회논문집
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• 한국조명전기설비학회 1998년도 학술발표회논문집
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• pp.162-165
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• 1998

A certain degree of energy saving can be possible by controlling the delay time of occupancy sensor. In this paper a control circuit is designed for automatic control of delay time setting appropriate to different situations using a digital counter, two latches and an adder. The delay time is controlled by adjusting the time constant of RC circuit through on-off control of switching devices according to adder output, which determines the base current level of switching devices. And from PSpice simulation it is verified to function properly.

• 한국자동차공학회논문집
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• 제1권3호
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• pp.1-11
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• 1993

An experimental study was carried out to evaluate the characteristics of transient performance of carburettered gasoline engine under rapid accelerating transient driving conditions. In order to evaluate the characteristics of transient performance quantitatively, the concept of dead time $t_d$ response delay time $t_r$ are introduced. Performance parameters such as air mass fiowrate Gat, engine speed N, manifold boost pressure Pb, and output torque T are measured simultaneously during the rapid opening of the throttle valve by the stepping motor. During the rapid opening of the throttle valve, air mass fiowrate Gat is increased immediately without delay time, but response of engine revolution N, and output torque T are delayed. Therefore hesitation, and stumble phenomena are occurred. Dead time $t_d$ and response delay time $t_r$ of engine revolution N, which is extremely delayed comparing to other performance parameters, are respectively 0.2-0.3sec., 3.0-4.6sec., and dead time rate $t_d/{\Delta}t$ and response delay time rate $t_r/{\Delta}t$ are linearly increased with the throttle valve opening rate ${\theta}$ during the acceleration from 12 degree to 20 degree at 1250rpm.

• 전자공학회논문지SC
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• 제41권3호
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• pp.9-16
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• 2004

본 논문에서는 시변 시간지연을 가지는 특이시스템에 대한 관측기 기반 Η∞ 출력궤환 제어기 설계방법을 단 하나의 선형행렬부등식 조건을 이용하여 제시한다. 제어기가 존재할 충분조건과 제어기 설계방법을 모든 변수의 견지에서 완벽한 하나의 선형행렬부등식으로 표현하여 볼록최적화가 가능하도록 한다. 제어기의 설계과정은 제안한 하나의 충분조건으로부터 직접 구해진다. 구한 충분조건은 하나의 선형행렬부등식으로 표현되어지므로, 슈어 여수정리와 변수치환 및 특이치 분해의 기법에 의하여 궤환이득과 추정이득을 포함하는 모든 해로부터 관측기 기반 Η∞ 출력궤환 제어기를 동시에 구할 수 있다. 또한 제안한 알고리듬을 이용하여 파라미터 불확실성과 시간지연을 가지는 특이시스템에 대한 관측기 기반 견실 Η∞ 출력제환 제어기 설계도 가능함을 보인다. 마지막으로, 제안한 알고리듬의 타당성을 수치예제를 통하여 확인한다.

• 한국전자파학회논문지
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• 제28권6호
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• pp.444-451
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• 2017

본 논문에서는 고속 데이터 송수신을 위해 2차원 iDFT(inverse Discrete Fourier Transform) 및 DFT(Discrete Fourier Transform) 연산을 이용하여 Delay-Doppler 스프레딩 영향을 고속 수신 처리하는 OTFS(Orthogonal Time Frequency Space) 변조 시스템과 OTFS-MIMO(Multiple Input Multiple Output) 시스템을 평가하고 분석한다. 특히 OTFS 변조를 사용하는 MIMO 시스템은 높은 Doppler 효과가 존재하는 채널에서도 시스템의 용량 저하가 거의 없이 모든 데이터 스트림을 전송할 수 있다. 시뮬레이션 결과, $1{\times}1$ OTFS 변조 시스템의 전송률은 $2{\times}2$ OTFS-MIMO 시스템에서 한 스트림의 전송률과 유사함을 확인할 수 있다. 즉, $2{\times}2$ OTFS-MIMO 시스템은 높은 Delay-Doppler 영향이 존재하는 환경에서도 $1{\times}1$ OTFS 변조 시스템과 비교하여 거의 2배의 전송률을 확보할 수 있음을 확인할 수 있다.

• 대한전자공학회논문지TC
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• 제37권7호
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• pp.1-8
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• 2000

본 논문에서는 CDMA 시스템에서 다중 사용자 검출을 위해 수신신호를 나누는 개념과 순차적 간섭 제거기를 조합한 새로운 간섭 제거기를 제안한다. 본 간섭 제거기에서 수신신호를 첫 번째 그룹의 입력 신호로 이용하며, m개의 그룹들을 통과해서 m개의 그룹 출력 신호들은 만들어진다. e번째 그룹의 출력 신호를 제외한 모든 그룹의 출력 신호들은 더해져서 수신신호로부터 제거되고 그로부터 얻어지는 신호는 번째 순차적 간섭 제거기의 입력 신호로 이용된다. 컴퓨터 시뮬레이션 및 구조분석을 통해서 향상된 순차적 간섭 제거기가 비트 오율과 복잡성의 면에서 순차적 간섭 제거기의 성능을 유지시키는 동시에 순차적 간섭 제거기의 지연시간에 대한 단점을 향상시킴을 보여준다.

• 대한전자공학회논문지
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• 제24권4호
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• pp.701-707
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• 1987

This paper is concerned with an accurate delay time modling of the ED MOS logic gates and its application to the multiple delay logic simulator. The proposed delay model of the ED MOS logic gate takes account of the effects of not only the loading conditions but also the slope of the input waveform. Defining delay as the time spent by the current imbalance of the active inverter to charge and discharge the output load, with respect to physical reference levels, rise and fall model delay times are obtained in an explicit formulation, using optimally weighted imbalance currents at the end points of the voltage transition. A logic simulator which uses multiple rise/fall delays based on the model as decribed in the above has been developed. The new delay model and timing verification method are evaluated with repect to delay accuracy and execution time.

• Journal of Advanced Marine Engineering and Technology
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• 제30권4호
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• pp.505-513
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• 2006

A linear power amplifier is particularly emphasized on the system using a linear modulations, such as 16QAM and QPSK with pulse shaping. because intermodulation distortion which causes adjacent channel interference and co-channel interference is mostly generated in a nonlinear power amplifier. In this paper, parameters of a linearization loop, such as an amplitude imbalance a phase imbalance and a delay mismatch, are briefly analyzed to get a specific cancellation performance and linearization bandwidth. Experimental results are presented for IMT-2000 frequency band. The center frequency of the feedforward amplifier is 2140 MHz with 60 MHz bandwidth. When the average output power of feedforward amplifier is 20 Watt. the intermodulation cancellation performance is more than 21 dB. In this case, the output power of feedforward amplifier reduced 3.5 dB because of extra delay line loss and coupling loss. The feedforward amplifier efficiency is more than 7.2 % for multicarrier signals, 59 dBc for ACPR.