• Journal of the Institute of Electronics Engineers of Korea SD
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• v.45 no.12
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• pp.65-72
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• 2008

This paper proposes a new dual-loop digital PLL(DPLL) using seamless frequency tracking methods. The dual-loop construction, which is composed of the coarse and fine loop for fast locking time and a switching noise suppression, is used successive approximation register technique and TDC. The proposed DPLL in order to compensate the quality of jitter which follows long-term of input frequency is newly added cord conversion frequency tracking method. Also, this DPLL has VCO circuitry consisting of digitally controlled V-I converter and current-control oscillator (CCO) for robust jitter characteristics and wide lock range. The chip is fabricated with Dongbu HiTek $0.18-{\mu}m$ CMOS technology. Its operation range has the wide operation range of 0.4-2GHz and the area of $0.18mm^2$. It shows the peak-to-peak period jitter of 2 psec under no power noise and the power dissipation of 18mW at 2GHz through HSPICE simulation.

• Journal of the Institute of Electronics Engineers of Korea SD
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• v.39 no.5
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• pp.8-15
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• 2002

We optimally designed the VCO(voltage-controlled oscillator) with spiral inductor using the MOSIS HP 0.5${\mu}{\textrm}{m}$ CMOS process. With the developed SPICE model of spiral inductor, the quality factor of spiral inductor was maximized at the operating frequency by varying the layout parameters, e.g., metal width, number of turns, radius, space of the metal lines. For the operation frequency of 2㎓, the inductance of about 3nH, and the MOSIS HP 0.5 CMOS process with the metal thickness of 0.8${\mu}{\textrm}{m}$, oxide thickness of 3${\mu}{\textrm}{m}$, the optimal width of metal lines is about 20${\mu}{\textrm}{m}$ for the maximum Quality factor. With the optimized spiral inductor, the VCO with LC tuning tank was designed, fabricated and measured. The measurements were peformed on-wafer using the HP8593E spectrum analyzer. The oscillation frequency was about 1.610Hz, the frequency variation of 250MHz(15%) with control voltage of 0V - 2V, and the phase noise of -108.4㏈c(@600KHz) from output spectrum.

• The Journal of Korean Institute of Electromagnetic Engineering and Science
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• v.23 no.6
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• pp.682-690
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• 2012

In this paper, a highly linear self oscillating mixers(SOM) using second harmonic injections are presented. The H-slot defected ground structure(DGS) is designed as a balanced resonator for oscillation in the proposed SOM. Since the H-slot DGS resonator achieves a high Q factor, it is a suitable structure to provide low phase noise for the oscillator. The single balanced mixer is utilized in this work and it provides good LO-RF isolation since balanced LO signals are suppressed at the RF input port. In order to inject the second harmonic of the IF, we propose two different methods using feedback loops. In the first method, IF achieves a 3.08 dB conversion gain at 226 MHz with input power of -20 dBm at 5 GHz RF input signal. The IF achieves 2 dB conversion gain at 423 MHz with the input power of -20 dBm at 5.2 GHz RF input signal in the second method. The measured IMD3s are 61.8 dB and 65 dB for the each method. These SOMs present improved linearity compared to that without the second harmonic injection because IMD3s are improved by 18. dB and 21 dB for each method.