• Title/Summary/Keyword: on-line elimination

Search Result 97, Processing Time 0.039 seconds

A Study on Performance Enhancement of Distance Relaying by DC Offset Elimination Filter (직류옵셋제거필터에 의한 거리계전기법의 성능 개선에 관한 연구)

  • Lee, Kyung-Min;Park, Yu-Yeong;Park, Chul-Won
    • The Transactions of the Korean Institute of Electrical Engineers P
    • /
    • v.64 no.2
    • /
    • pp.67-73
    • /
    • 2015
  • Distance relay is widely used for the protection of long transmission line. Most of distance relay used to calculate line impedance by measuring voltage and current using DFT. So if there is a computation error due to the influence of phasor by DC offset component, due to excessive vibration by measuring line impedance, overreach or underreach can be occurs, and then abnormal and non-operation of distance relay can be issue. It is very important to implement the robust distance relaying that is not affected by DC offset component. This paper describes an enhanced distance relaying based on the DC offset elimination filter to minimize the effects of DC offset on a long transmission line. The proposed DC offset elimination filter has not need any prior information. The phase angle delay of the proposed DC offset filter did not occurred and the gain error was not found. The enhanced distance relay uses fault current as well as residual current. The behavior of the proposed distance relaying using off-line simulation has been verified using data about several fault conditions generated by the ATP simulation software.

Enhanced Fault Location Algorithm for Short Faults of Transmission Line (1회선 송전선로 단락사고의 개선된 고장점 표정기법)

  • Lee, Kyung-Min;Park, Chul-Won
    • The Transactions of The Korean Institute of Electrical Engineers
    • /
    • v.65 no.6
    • /
    • pp.955-961
    • /
    • 2016
  • Fault location estimation is an important element for rapid recovery of power system when fault occur in transmission line. In order to calculate line impedance, most of fault location algorithm uses by measuring relaying waveform using DFT. So if there is a calculation error due to the influence of phasor by DC offset component, due to large vibration by line impedance computation, abnormal and non-operation of fault locator can be issue. It is very important to implement the robust fault location algorithm that is not affected by DC offset component. This paper describes an enhanced fault location algorithm based on the DC offset elimination filter to minimize the effects of DC offset on a long transmission line. The proposed DC offset elimination filter has not need any erstwhile information. The phase angle delay of the proposed DC offset filter did not occurred and the gain error was not found. The enhanced fault location algorithm uses DFT filter as well as the proposed DC offset filter. The behavior of the proposed fault location algorithm using off-line simulation has been verified by data about several fault conditions generated by the ATP simulation program.

An On-Line Harmonic Elimination Pulse Width Modulation Scheme for Voltage Source Inverter

  • Salam, Zainal
    • Journal of Power Electronics
    • /
    • v.10 no.1
    • /
    • pp.43-50
    • /
    • 2010
  • This paper proposes a new harmonic elimination PWM (HEPWM) scheme for voltage source inverters (VSI) based on the curve fittings of certain polynomials functions. The resulting equations to calculate the switching angle of the HEPWM require only the addition and multiplication processes; therefore any number of harmonics to be eliminated and the fundamental amplitude of the pole switching waveform (NP1) can be controlled on-line. An extensive angle error analysis is carried out to determine the accuracy of the algorithm in comparison to the exact solution. To verify the workability of the technique, an experimental single phase VSI is constructed. The algorithm is implemented on a VSI using a 16-bit microprocessor. The results obtained from the test rig are compared to the theoretical prediction and the results of the MATLAB simulations.

The Effect of Weld Line on the Mechanical Strengths and its Elimination Process in the Zr-4 Resistance Upset Welds (지르칼로이-4의 저항업셋용접에서 용접선이 기계적성질에 미치는 영향과 그 소멸과정)

  • Koh, Jin-Hyun;Lee, Jung-Won;Jung, Sung-Hoon
    • Nuclear Engineering and Technology
    • /
    • v.23 no.1
    • /
    • pp.1-11
    • /
    • 1991
  • The objective of this study is to investigate the effect of weld line on the mechanical strengths and the process of weld line elimination in the Zircaloy-4 resistance upset welding for the fabrication of heavy water reactor fuel rods. The weld current and the amount of upset increased linearly with the main heat, in which two relations between them were derived. It was found that the threshold to obtain sound weld was 50% of main heat in terms of weld upset size, mechanical strengths and weld line elimination. The weld microstructure of resistance upset welds of Zircaloy-4 comprsied basketweave, Widmanstatten and martensite respectively by changing the main heats. Dimples on uniaxially fractured surface at weld line in the Zr-4 welds were larger and deeper compared with those on biaxially fractured surface. It was also found that the process of the weld line elimination in the resistance upset weld of Zircaloy-4 could be divided into three stages in terms of the presence of many pores, their shrinkage and elimination, and the shrinkage of the original weld interface with increasing weld currents.

  • PDF

Power line interference noise elimination method based on independent component analysis in wavelet domain for magnetotelluric signal

  • Cao, Xiaoling;Yan, Liangjun
    • Geosystem Engineering
    • /
    • v.21 no.5
    • /
    • pp.251-261
    • /
    • 2018
  • With the urbanization in recent years, the power line interference noise in electromagnetic signal is increasing day by day, and has gradually become an unavoidable component of noises in magnetotelluric signal detection. Therefore, a kind of power line interference noise elimination method based on independent component analysis in wavelet domain for magnetotelluric signal is put forward in this paper. The method first uses wavelet decomposition to change single-channel signal into multi-channel signal, and then takes advantage of blind source separation principle of independent component analysis to eliminate power line interference noise. There is no need to choose the layer number of wavelet decomposition and the wavelet base of wavelet decomposition according to the observed signal. On the treatment effect, it is better than the previous power line interference removal method based on independent component analysis. Through the de-noising processing to actual magnetotelluric measuring data, it is shown that this method makes both the apparent resistivity curve near 50 Hz and the phase curve near 50 Hz become smoother and steadier than before processing, i.e., it effectively eliminates the power line interference noise.

Realization of Hybrid Filter for Harmonics Elimination on the Power line (전원의 고조파 제거를 위한 Hybrid Filter의 실현)

  • Bang Sun-Bae;Jung Dong-Youl;Hwang Hwan-Young;Park Chong-Yeun
    • Proceedings of the KIPE Conference
    • /
    • 2004.07b
    • /
    • pp.764-768
    • /
    • 2004
  • This paper proposed Hybrid Filter for harmonics elimilation on the power line. It's control method is very simple, but its performance is better than the results by passive filter. For the harmonics elimination, we improved the performance of the BPF(Band-pass Filter) with the GIC(Generalize Impedance Converter), and the new hysterisys controller.

  • PDF

Simple On-line Elimination Strategy of Dead Time and Nonlinearity in Inverter-fed IPMSM Drive Using Current Slope Information (IPMSM 드라이브에서 전류 기울기 정보를 이용한 데드타임 및 인버터 비선형성 효과의 간단한 제거 기법)

  • Park, Dong-Min;Kim, Myung-Bok;Kim, Kyeong-Hwa
    • The Transactions of the Korean Institute of Power Electronics
    • /
    • v.17 no.5
    • /
    • pp.401-408
    • /
    • 2012
  • A simple on-line elimination strategy of the dead time and inverter nonlinearity using the current slope information is presented for a PWM inverter-fed IPMSM (Interior Permanent Magnet Synchronous Motor) drive. In a PWM inverter-fed IPMSM drive, a dead time is inserted to prevent a breakdown of switching device. This distorts the inverter output voltage, resulting in a current distortion and torque ripple. In addition to the dead time, inverter nonlinearity exists in switching devices of the PWM inverter, which is generally dependent on operating conditions such as the temperature, DC link voltage, and current. The proposed scheme is based on the fact that the d-axis current ripple is mainly caused by the dead time and inverter nonlinearity. To eliminate such an influence, the current slope information is determined. The obtained current slope information is processed by the PI controller to estimate the disturbance caused by the dead time and inverter nonlinearity. The overall system is implemented using DSP TMS320F28335 and the validity of the proposed algorithm is verified through the simulation and experiments. Without requiring any additional hardware, the proposed scheme can effectively eliminate the dead time and inverter nonlinearity even in the presence of the parameter uncertainty.

An analysis on the Deconstructed Visage in Fashion Illustration - Based on the Deconstructed Visage of Francis Bacon's Painting - (패션 일러스트레이션에 나타난 얼굴해체 - 프란시스 베이컨 회화의 얼굴해체를 바탕으로 -)

  • Choi, Jung-Hwa;Choi, Yoo-Jin
    • Fashion & Textile Research Journal
    • /
    • v.15 no.6
    • /
    • pp.874-885
    • /
    • 2013
  • This study analyzes the visage in fashion illustration based on the deconstructed visage of Francis Bacon's paintings as well as analyzes fashion illustration works since 2000. The deconstructed visages in Francis Bacon's paintings are classified as blurring, elimination, distortion and division. The expressive methods and meanings in fashion illustration (according to categorization) are as follow. Blurring shows an ambiguous visage organ by the sweeping of the brush, removal of a boundary among the visage, body and clothes, gradation of organic line like visage shapes, stretching of the a plat combined to visage and fragmentation of visage. It represents an uncertainty of the fashion theme and image interpretation, impossibility of figure by ambiguity, fantastic effect and the induction of the uncanny. Elimination shows the background color's painting of a photo-montage, overlap of a cutting of visage's part and background of a plat, elimination of the visage and the elimination of eyes, nose or lips. It represents a weakened identity, the reinforcement of anonymity, creation of a violent image, and uncanny unfamiliarity. Distortion shows a distorted visage by free drawing, and unconscious drawing line, fluid digital body, combination of an unconscious curve, and an eccentric combination of the accidental. It represents the relief of specialty about realistic existence, hypothetical immateriality and fantasy. Division shows overlapped visages with different angles, the weird combination of a plural visage and different species and a plural breakaway of direction, and the position of several organs. It represents motion by power's trace, non-territory of species, ambiguity and uncertainty and the uncanny.

Directivity Synthesis Simulation of Ultrasonic Transducer Using Gauss Elimination Method (GAUSS 소거법을 이용한 초음파 트랜스듀서의 지향성합성 SIMULATION)

  • 이정남;조기량;이진선;이문수
    • The Proceeding of the Korean Institute of Electromagnetic Engineering and Science
    • /
    • v.6 no.4
    • /
    • pp.20-27
    • /
    • 1995
  • A numerical simulation is carried out on the directivity synthesis of ultrasonic transducers by point source array. Gauss elimination method is practiced by means of a directive method to realize the desired directivity. Desired directivity is chosen to be that of a directivity of line source, a beam width and a direction arbitrary specified. On the numerical result, Gauss elimination method is showed high speed ca- lculative simulation and stability of system more than iterative method(LMS, DFP). Numerical simulations are carried out by PC(CPU:80486 DX2, RAM 16Mbyte).

  • PDF

Inrush Current Elimination for a Three-Phase Off-Line UPS System (3상 오프라인 무정전 전원 시스템의 돌입전류 제거)

  • Bukhari, Syed Sabir Hussain;Kwon, Byung-il
    • Proceedings of the KIEE Conference
    • /
    • 2015.07a
    • /
    • pp.944-945
    • /
    • 2015
  • Many sensitive loads always rely on UPS systems to maintain continuous power during abnormal utility power conditions. As any disturbance occurs at the utility side, an off-line UPS system takes over the load within a quarter cycle to avoid a blackout. However, the starting of the inverter can root the momentous inrush current for the transformer installed before the load, due to its magnetic saturation. The consequences of this current can be a reduction of line voltage and tripping of protective devices of the UPS system. Furthermore, it can also damage the transformer and decrease its lifetime by increasing the mechanical stresses on its windings. To prevent the inrush current, and to avoid its disruptive effects, this paper proposes an off-line UPS system that eliminates the inrush current phenomenon while powering the transformer coupled loads, using a current regulated voltage source inverter (CRVSI) instead of a typical voltage source inverter (VSI). Simulations have been performed to validate the operation of proposed off-line UPS system.

  • PDF