• 한국진공학회:학술대회논문집
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• 한국진공학회 2009년도 제37회 하계학술대회 초록집
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• pp.210-210
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• 2009

• 한국진공학회:학술대회논문집
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• 한국진공학회 2009년도 제36회 동계학술대회 초록집
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• pp.131.2-131.2
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• 2009

• 한국세라믹학회:학술대회논문집
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• 한국세라믹학회 2000년도 추계총회,초청강연,특별강연,연구발표회
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• pp.145.1-145
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• 2000

• 한국진공학회:학술대회논문집
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• 한국진공학회 2008년도 제34회 동계학술대회 초록집
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• pp.126-126
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• 2008

• 한국반도체및디스플레이장비학회:학술대회논문집
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• 한국반도체및디스플레이장비학회 2005년도 추계 학술대회
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• pp.137-141
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• 2005

Quantum dot(QD) 메모리용 silicon nano-particle을 corona 방전방법에 의해 상온에서 대량 발생하는 방법을 개발하였다. Silicon QD는 SiH4 가스를 코로나 방전 영역을 통과시켜 발생시켰으며, 코로나 전압은 2.75kV를 사용하였다. SiH4 몰농도 $0.33{\times}10^{-7}\;mol/l$ 일 경우 발생된 QD입자 크기는 약 10nm이며 기하학적 표준편차(geometric standard deviation)는 1.31이었다. 이 조건에서 nonvolatile quantum dot semiconductor memory (NVQDM)를 제작하였으며, 이렇게 제작된 NVQDM flat band voltage는 1.5 volt였다.

• 사물인터넷융복합논문지
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• 제9권1호
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• pp.19-24
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• 2023

최근 메모리 기술의 급격한 발전으로 개발되고 있는 다양한 종류의 메모리는 데이터 관리 시스템에서 처리 속도 향상을 위해 활용되고 있다. 특히 NAND 플래시 메모리는 전원이 차단되어도 데이터를 유지할 수 있는 비휘발성 특징이 있으므로 메모리 기반 저장장치의 데이터 저장용 주요 미디어로 활용되고 있다. 그러나 최근 연구되고 있는 메모리 기반 저장장치는 NAND 플래시 메모리뿐만 아니라 MRAM과 PRAM 등 다양한 종류의 메모리로 구성되어 있고 추가로 새로운 특성이 있는 다양한 종류의 메모리가 개발되고 있다. 따라서 특성이 서로 다른 이종의 메모리들로 구성된 저장 시스템에서 미디어의 데이터 처리 성능과 효율 향상을 위한 메모리 관리 기술의 연구가 필요하다. 본 논문에서는 데이터 관리를 위해 다양한 메모리로 구성된 저장장치에서 데이터를 효율적으로 관리하기 위한 메모리 사상 기법을 제안한다. 제안하는 아이디어는 서로 다른 이종 메모리를 하나의 사상 테이블을 활용하여 관리하는 방법이다. 이 방법은 데이터의 주소 체계를 통일할 수 있고 데이터 티어링(tiering)을 위해 서로 다른 메모리에 분할 저장된 데이터의 탐색 비용을 감소시킬 수 있다.

• 한국진공학회:학술대회논문집
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• 한국진공학회 2011년도 제40회 동계학술대회 초록집
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• pp.118-118
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• 2011

The Nano-Floating Gate Memory(NFGM) devices with ZnO:Cu thin film embedded in Al2O3 and AlOx-SAOL were fabricated and the electrical characteristics were evaluated. To further improve the scaling and to increase the program/erase speed, the high-k dielectric with a large barrier height such as Al2O3 can also act alternatively as a blocking layer for high-speed flash memory device application. The Al2O3 layer and AlOx-SAOL were deposited by MLD system and ZnO:Cu films were deposited by ALD system. The tunneling layer which is consisted of AlOx-SAOL were sequentially deposited at $100^{\circ}C$. The floating gate is consisted of ZnO films, which are doped with copper. The floating gate of ZnO:Cu films was used for charge trap. The same as tunneling layer, floating gate were sequentially deposited at $100^{\circ}C$. By using ALD process, we could control the proportion of Cu doping in charge trap layer and observe the memory characteristic of Cu doping ratio. Also, we could control and observe the memory property which is followed by tunneling layer thickness. The thickness of ZnO:Cu films was measured by Transmission Electron Microscopy. XPS analysis was performed to determine the composition of the ZnO:Cu film deposited by ALD process. A significant threshold voltage shift of fabricated floating gate memory devices was obtained due to the charging effects of ZnO:Cu films and the memory windows was about 13V. The feasibility of ZnO:Cu films deposited between Al2O3 and AlOx-SAOL for NFGM device application was also showed. We applied our ZnO:Cu memory to thin film transistor and evaluate the electrical property. The structure of our memory thin film transistor is consisted of all organic-inorganic hybrid structure. Then, we expect that our film could be applied to high-performance flexible device.----못찾겠음......

• 한국전기전자재료학회논문지
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• 제15권7호
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• pp.576-582
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• 2002

Nonvolatile semiconductor memory devices with reoxidized nitrided oxide(RONO) gate dielectrics were fabricated, and nitrogen distribution and bonding species which contribute to memory characteristics were analyzed. Also, memory characteristics of devices depending on the anneal temperatures were investigated. The devices were fabricated by retrograde twin well CMOS processes with $0.35\mu m$ design rule. The processes could be simple by in-situ process in growing dielectric. The nitrogen distribution and bonding states of gate dielectrics were investigated by Dynamic Secondary Ion Mass Spectrometry(D-SIMS), Time-of-Flight Secondary Ion Mass Spectrometry(ToF-SIMS), and X-ray Photoelectron Spectroscopy(XPS). As the nitridation temperature increased, nitrogen concentration increased linearly, and more time was required to form the same reoxidized layer thickness. ToF-SIMS results showed that SiON species were detected at the initial oxide interface which had formed after NO annealing and $Si_2NO$ species within the reoxidized layer formed after reoxidation. As the anneal temperatures increased, the device showed worse retention and degradation properties. It could be said that nitrogen concentration near initial interface is limited to a certain quantity, so the excess nitrogen is redistributed within reoxidized layer and contribute to electron trap generation.

• 한국전기전자재료학회논문지
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• 제13권10호
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• pp.822-827
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• 2000

The Si-SiO$_2$interface trap and nitride bulk trap distribution of SONOSFET(polysilicon-oxide-nitride-oxide-semiconductor field effect transistor) NVSM (nonvolatile semiconductor memory) cell is investigated by single junction charge pumping method. The device was fabricated by 0.35㎛ standard logic fabrication process including the ONO stack dielectrics. The thickness of ONO dielectricis are 24$\AA$ for tunnel oxide, 74 $\AA$ for nitride and 25 $\AA$ for blocking oxide, respectively. By the use of single junction charge pumping method, the lateral profiles of both interface and memory traps can be calculated directly from experimental charge pumping results without complex numerical simulation. The interface traps were almost uniformly distributed over the whole channel region and its maximum value was 7.97$\times$10$\^$10/㎠. The memory traps were uniformly distributed in the nitride layer and its maximum value was 1.04$\times$10$\^$19/㎤. The degradation characteristics of SONOSFET with write/erase cycling also were investigated.

• 대한전기학회:학술대회논문집
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• 대한전기학회 2006년도 추계학술대회 논문집 전기물성,응용부문
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• pp.32-33
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• 2006

As next generation nonvolatile memory, chalcogenide-based phase change memory can substitute for a conventional flash memory from its high performance. Also, fast writing speed, low writing voltage, high sensing margin, low power consumption and repetition reliability over $10^{15}$ cycle shows its possibility. At our laboratory, we invented ${Ge_1}{Se_1}{Te_2}$ material to alternate with conventional ${Ge_2}{Sb_2}{Te_5}$ for improve its ability. We respect the ${Ge_1}{Se_1}{Te_2}$ material can be a solution for high power consumption problem and long time at 'set' performance. A conductivity experiment from variable temperature was performed to see reliability of repetition at read and write performance. Compare with conventional ${Ge_2}{Sb_2}{Te_5}$ material, these two materials are used as complex compound to get the finest parameter.