• 한국원자력학회:학술대회논문집
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• 한국원자력학회 1996년도 춘계학술발표회논문집(4)
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• pp.101-106
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• 1996

For the application of the neutron flux mapping, an accurate calculation of the sensitivity is required because the sensitivity is proportional to the neutron flux density. Sensitivity is defined as the current per unit length per unit neutron flux and it mainly depends on the depression factor(f), the escape probability from the emitter($\varepsilon$1) and the charge build-up factor of the insulator layer(c). A Monte Carlo simulation was accomplished to calculate the sensitivity of rhodium emitter material and alumina(Al$_2$O$_3$) insulator with a cylindrical geometry, based on the (n,${\beta}$) interaction and on other interaction including the secondary electron generation for the more accurate estimation of the sensitivity. From the simulation results, factors fur the sensitivity were accurately calculated and compared with other theoretical and experimental values. In addition, the sensitivity linearly increases and saturates as the emitter radius increases. The accomplished method is useful in the analysis for the change of SPND sensitivity as a function of burn-up and in the optimum design of SPND.

• E2M - 전기 전자와 첨단 소재
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• 제10권10호
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• pp.1034-1040
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• 1997

A solar cell conversion effiency was degraded by grain boundary effect in polycrystalline silicon. Grain boundaries acted as potential barriers as well as recombination centers for the photo-generated carriers. To reduce these effects of the grain boundaries we investigated various influencing factors such as emitter thickness thermal treatment preferential chemical etching of grain boundaries grid design contact metal and top metallization along boundaries. Pretreatment in $N_2$atmosphere and gettering by POCl$_3$and Al were performed to obtain multicrystalline silicon of the reduced defect density. Structural electrical and optical properties of slar cells were characterized before and after each fabrication process. Improved conversion efficiencies of solar cell were obtained by a combination of pretreatment above 90$0^{\circ}C$ emitter layer of 0.43${\mu}{\textrm}{m}$ Al diffusion in to grain boundaries on rear side fine grid finger top Yb metal and buried contact metallization along grain boundaries.

• 대한전기학회:학술대회논문집
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• 대한전기학회 1995년도 하계학술대회 논문집 C
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• pp.1440-1441
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• 1995

We fabricated diode-type silicon field emitter array device and tested the current-voltage characteristics. Silicon oxide layer having the thickness of $1{\mu}m$ is grown in the (100) oriented n-type silicon substrates. Oxide layer is patterned by the mask with $10{\mu}m$ diameter circles. Silicon substrate is then etched using NAF 1 solution to form the sharp tip arrays as an electron source. In the UHV test station, we tested the current-voltage characteristics for the samples. Turn-on voltage was about 140V and maximum emission current was $310{\mu}A$ at 164V. We studied about silicon bonding process for future work, too.

• 한국정보디스플레이학회:학술대회논문집
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• 한국정보디스플레이학회 2007년도 7th International Meeting on Information Display 제7권2호
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• pp.1474-1477
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• 2007

We demonstrate relaxation of roll-off characteristics by controlling the dopant concentrations and the thickness of an emitter layer in electrophosphorescence diodes composed of 2,6-dicarbazolo-1,5-pyridine (PYD2)-host doped with 25 wt%-Iridium(III)bis[(4,6-di-fluorophenyl)-pyridinato-$N,C^2$] picolinate (FIrpic).

• 한국진공학회:학술대회논문집
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• 한국진공학회 2016년도 제50회 동계 정기학술대회 초록집
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• pp.308-309
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• 2016

Reducing surface recombination is a critical factor for high efficiency silicon solar cells. The passivation process is for reducing dangling bonds which are carrier. Tunnel oxide layer is one of main issues to achieve a good passivation between silicon wafer and emitter layer. Many research use wet-chemical oxidation or thermally grown which the highest conversion efficiencies have been reported so far. In this study, we deposit ultra-thin tunnel oxide layer by PECVD (Plasma Enhanced Chemical Vapor Deposition) using $N_2O$ plasma. Both side deposit tunnel oxide layer in different RF-power and phosphorus doped a-Si:H layer. After deposit, samples are annealed at $850^{\circ}C$ for 1 hour in $N_2$ gas atmosphere. After annealing, samples are measured lifetime and implied Voc (iVoc) by QSSPC (Quasi-Steady-State Photo Conductance). After measure, samples are annealed at $400^{\circ}C$ for 30 minute in $Ar/H_2$ gas atmosphere and then measure again lifetime and implied VOC. The lifetime is increase after all process also implied VOC. The highest results are lifetime $762{\mu}s$, implied Voc 733 mV at RF-power 200 W. The results of C-V measurement shows that Dit is increase when RF-power increase. Using this optimized tunnel oxide layer is attributed to increase iVoc. As a consequence, the cell efficiency is increased such as tunnel mechanism based solar cell application.

• 반도체디스플레이기술학회지
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• 제22권3호
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• pp.46-51
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• 2023

We investigated the MoS₂ thin film layer by thermolytic deposition and applied it to the silicon solar cells. MoS₂ thin films were made by two methods of dipping and spin coating of (NH₄)₂MoS₄ precursor solution. We implemented two types of substrates of microtextured and nano-microtextured 6-in. Si pn junction wafers. The fabricated MoS₂ thin film layer was analyzed, and solar cells were fabricated by applying the standard silicon solar cell process. The MoS₂ thin film layer of sulfur-deficient form was deposited on the n-type emitter layer, and electrons, which are minority carriers, were well transported at the interface and exhibited photovoltaic solar cell characteristics. The cell efficiencies were achieved at 5% for microtextured wafers and 2.56% for nano-microtextured wafers.

• 한국신재생에너지학회:학술대회논문집
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• 한국신재생에너지학회 2011년도 춘계학술대회 초록집
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• pp.129.2-129.2
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• 2011

본 연구에서는 a-Si:H/c-si 구조의 이종접합 태양전지의 p a-Si:H 에미터 층의 박막 조건에 따라 태양전지 특성을 연구하였다. p, n-layer는 PECVD (Plasma-enhanced chemical vapor deposition) i-layer는 HWCVD(Hot wire chemical vapor deposition), ITO는 RF 마그네트론 스퍼터링법으로 제작하였다. p-layer의 도핑 농도, 기판 증착 온도, 증착 높낮이에 따라 특성을 비교 분석 하였다. QSSPC로 minority carrier life time, 자외 가시선 분광분석 장치로 투과 반사도를, Ellipsometer로 흡수 계수, 두께, FTIR로 막의 구성요소 등의 변화를 조사하여 개선된 p a-Si:H의 특성이 이종접합 태양전지에서 효율향상에 영향을 주는지 Photo IV와 EQE를 통하여 조사하였다.

• 전자공학회논문지D
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• 제35D권11호
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• pp.55-61
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• 1998

정공 전달 중합체인 Poly(N-vinylcarbazole) (PVK)와 전자전달 유기물 재료인 2-(4-biphenyl)-5-(t-butyl-phenyl)-1,3,4-oxadiazole (Bu-PBD)에 발광 유기물 색소 Coumurine 6, TPB, Rhodamine B를 각각 도핑한 단층박막 유기물 전기발광 소자를 제작하였다. 스핀 코팅 방법에 의한 단층 구조와 가용성 재료의 사용으로부터 소자제작이 간단하였다. 활성영역은 인듐주석산화물(ITO) 과 알루미늄 전극 사이에 놓인 단층으로 구성하고 있다. 이러한 구조에서 전자와 정공의 전하가 각 전극에서 PVK : Bu-PBD 활성층으로 주입된다. 전압을 인가한 후 발광된 빛의 색은 각각 TPB, C6, Rhodamine B의 유기물 색소에 의해 481nm, 500nm, 585nm 파장을 갖는 푸른색, 초록색 및 오렌지색을 나타내었다. PVK유기물은 다른 발광색을 갖는 유기물 색소를 분자 적으로 도핑 함으로서 주요한 중합체로서 사용될 수 있다. 그리고 전기발광색은 전체 가시광선 파장 내로 조절될 수 있다.

• Current Photovoltaic Research
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• 제2권4호
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• pp.173-176
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• 2014

We have investigated the seed layer formation of front side contact using the inkjet printing process. Conductive silver ink was printed on textured Si wafers with 80 nm thick $SiN_x$ anti reflection coating (ARC) layers and thickened by light induced plating (LIP). The inkjet printable sliver inks were specifically formulated for inkjet printing on these substrates. Also, a novel method to prepare nano-sized glass frits by the sol-gel process with particle sizes around 5 nm is presented. Furthermore, dispersion stability of the formulated ink was measured using a Turbiscan. By implementing these glass frits, it was found that a continuous and uniform seed layer with a line width of $40{\mu}m$ could be formed by a inkjet printing process. We also investigated the contact resistance between the front contact and emitter using the transfer length model (TLM). On an emitter with the sheet resistance of $60{\Omega}/sq$, a specific contact resistance (${\rho}_c$) below $10m{\Omega}{\cdot}cm^2$ could be achieved at a peak firing temperature around $700^{\circ}C$. In addition, the correlation between the contact resistance and interface microstructures were studied using scanning electron microscopy (SEM). We found that the added glass particles act as a very effective fire through agent, and Ag crystallites are formed along the interface glass layer.

• 대한전자공학회:학술대회논문집
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• 대한전자공학회 1998년도 하계종합학술대회논문집
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• pp.387-390
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• 1998

In this paper, HBT's with lower phase noise and passive elements, such as resistors, capacitors and inductors, for resonance and impedance matching networks are designed, fabricated, tested, and carefully analysed, respectively, and then, they are integrated for the design and fabrication of functional X-band oscillators with lower phase noise. Epi-wafers for HBT's with the structure of graded $Al_{x}$G $a_{1-x}$ As emitter and C-doped base layer of 700.angs. thick were used to specially emphasize the improvement of $f_{T}$ and $f_{max}$, and the lowering of phase noise, in design aspects. At the test frequencies of 12GHz, capacitances of MIM capacitors, spiral inductor, and resistances are 0.5~10pF, 0.4~11.06nH, and 20~1,380.ohm., respectively. The emitter size of HBY's for the X-band MMIC oscillators is 3*10u $m^{2}$, and find chip size is 0.9*0.9m $m^{2}$..EX>.