• Journal of the Institute of Electronics Engineers of Korea SD
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• v.48 no.2
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• pp.14-19
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• 2011

We have fabricated GaN Schottky barrier diode (SBD) for high-voltage applications on Si substrate. The leakage current and the electrical characteristics of GaN SBD are investigated by annealing metal-semiconductor junctions. Ohmic junctions of Ti/Al/Mo/Au and Schottky junctions of Ni/Au are used in the fabrication. A test structure is proposed to measured buffer leakage current through a mesa structure. When annealing temperature is increased from $700^{\circ}C$ to $800^{\circ}C$, measured buffer leakage current is also increased from 87 nA to 780 nA at the width of 100 ${\mu}m$. The diffusion of Au, Ti, Mo, O into GaN buffer layer increases the leakage current and that is verified by Auger electron spectroscopy. Experimental results show that the low leakage current and the high breakdown voltage of GaN SBD are achieved by annealing metal-semiconductor junctions.

• Journal of the Korean Institute of Telematics and Electronics
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• v.25 no.5
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• pp.509-521
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• 1988

In the designs of integrated circuits, the buffer circuits used for driving a large capacitive load from minimum-structured logic circuit outputs have important effects upon system throughputs. Therefore it is important to optimize the buffer circuits. In this paper, the principle of designing CMOS buffer circuits which have the minimum delay and drive the given capacitive load is discussed. That is, the effects of load capacitance upon rise time, fall time, and delay of the CMOS inverter and the effects of parasitic capacitances are finely analysed to calculate the requested minimum-delay CMOS buffer condition. This is different from the method by C.A. Mead et. al.[2.3.4.]which deals with passive-load-nMOS buffers. Large channel width MOS transistor stages are necessary to drive a large capacitive load. The effects of polysilicon gate resistances of such large stages upon delay are also analysed.And, the area of buffer circuits designed by the proposed method is smaller than that of buffer circuits designed by C.A. Mead's method.

• Proceedings of the Korean Institute of Electrical and Electronic Material Engineers Conference
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• 2007.06a
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• pp.333-334
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• 2007

This paper describes the characteristics of poly (polycrystalline) 3C-SiC grown on SiOz and AlN substrates, respectively. The crystalline quality of poly 3C-SiC was improved from resulting in decrease of FWHM (full width half maximum) of XRD by increasing the growth temperature. The minimum growth temperature of poly 3C-SiC was $1100^{\circ}C$. The surface chemical composition and the electron mobility of poly 3C-SiC grown on each substrate were investigated by XPS and Hall Effect, respectively. The chemical compositions of surface of poly 3C-SiC films grown on $SiO_2$ and AlN were not different. However, their electron mobilities were $7.65\;cm^2/V.s$ and $14.8\;cm^2/V.s$, respectively. Therefore, since the electron mobility of poly 3C-SiC films grown on AlN buffer layer was two times higher than that of 3C-SiC/$SiO_2$, a AlN film is a suitable material, as buffer layer, for the growth of poly 3C-SiC thin films with excellent properties for M/NEMS applications.

• Bulletin of the Korean Chemical Society
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• v.12 no.6
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• pp.652-658
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• 1991

The effect of intermolecular collisions in the infrared multiphoton dissociation (IRMPD) of difluorochloromethane was investigated using He, Ar, and $N_2$ as buffer gases. The reaction probability for IRMPD of difluorochloromethane was measured as a function of laser fluence and the buffer gas pressure under unfocused beam geometry. It was observed that the reaction probability was initially enhanced with the increase of buffer gas pressure up to about 20 torr, but showed a decline at higher pressures. The reaction probability increases monotonically with the laser fluence, but the rate of increase diminishes at higher fluences. An attempt was made to simulate the experimental results by the method of energy grained master equation (EGME). From the parameters that fit the experimental data, the average energy loss per collision, $<{\Delta}E>_d$, was estimated for the He, Ar, and $N_2$ buffer gases.

• Proceedings of the Korean Vacuum Society Conference
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• 2002.02a
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• pp.111-112
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• 2002

• Proceedings of the KIEE Conference
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• 1998.07d
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• pp.1321-1323
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• 1998

We investigated drain leakage current in GaAs power MESFET. The device we studied by 20 simulation has a $1000{\AA}$ thick AlGaAs buffer layer under n-GaAs active layer. The calculation shows that the leakage current through GaAs substrate is significantly reduced by the buffer layer.

• Journal of Communications and Networks
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• v.16 no.6
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• pp.656-666
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• 2014

In delay tolerant networks (DTNs), delay is inevitable; thus, making better use of buffer space to maximize the packet delivery rate is more important than delay reduction. In DTNs, epidemic routing is a well-known routing protocol. However, epidemic routing is very sensitive to buffer size. Once the buffer size in nodes is insufficient, the performance of epidemic routing will be drastically reduced. In this paper, we propose a buffer scheme to optimize the performance of epidemic routing on the basis of the Lagrangian and dual problem models. By using the proposed optimal buffer scheme, the packet delivery rate in epidemic routing is considerably improved. Our simulation results show that epidemic routing with the proposed optimal buffer scheme outperforms the original epidemic routing in terms of packet delivery rate and average end-to-end delay. It is worth noting that the improved epidemic routing needs much less buffer size compared to that of the original epidemic routing for ensuring the same packet delivery rate. In particular, even though the buffer size is very small (e.g., 50), the packet delivery rate in epidemic routing with the proposed optimal buffer scheme is still 95.8%, which can satisfy general communication demand.

• Journal of the Korean Institute of Electrical and Electronic Material Engineers
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• v.21 no.6
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• pp.493-498
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• 2008

This Paper describes the Raman scattering characteristics of polycrystalline (Poly) 3C-SiC thin films, in which they were deposited on AlN buffer layer by APCVD using hexamethyldisilane (MHDS) and carrier gases (Ar+$H_2$). When the Raman spectra of SiC films deposited on the AlN layer of before and after annealing were worked according to growth temperature, D and G bands of graphite were measured. It can be explained that poly 3C-SiC films admixe with nanoparticle graphite and its C/Si rate is higher than ($C/Si\;{\approx}\;3$) that of the conventional SiC, which has no D and G bands related to graphite. From the Raman shifts of 3C-SiC films deposited at $1180^{\circ}C$ on the AlN layer of after annealing, the biaxial stress of poly 3C-SiC films was obtained as 896 MPa.

• Journal of Surface Science and Engineering
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• v.34 no.5
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• pp.421-428
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• 2001

New WC-CrN superlattice film was deposited on Si substrate (500$\mu\textrm{m}$) using cathodic arc ion plating system. The microstructure and mechanical properties of the film depend on the superlattice period (λ). In the X-ray diffraction analysis (XRD), preferred orientation of microstructure was changed according to various superlattice periods(λ). During the Transmission Electron Microscope analysis (TEM), microstructure and superlattice period (λ) of the WC - CrN superlattice film was confirmed. Hardness and adhesion of the deposited film was evaluated by nanoindentation test and scratch test, respectively. As a result of nanoindentation test, the hardness of WC - CrN superlattice film was gained about 40GPa at superlattice period (λ) with 7nm. Also residual stress with various superlattice period (λ) was measured on Si wafer (100$\mu\textrm{m}$) by conventional beam-bending technique. The residual stress of the film was reduced to a value of 0.2 GPa by introducing Ti - WC buffer layers periodically with a thickness ratio ($t_{buffer}$/$t_{buffer+superlattice}$ ). To the end, for the evaluation of oxidation resistance at the elevated temperature, CrN single layer and WC - CrN superlattice films with various superlattice periods on SKD61 substrate was measured and compared with the oxidation resistance.

• Proceedings of the Korean Vacuum Society Conference
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• 2011.02a
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• pp.91-91
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• 2011

박막태양전지의 높은 효율개선을 위해 TCO층과 p-layer 사이에 buffer layer를 넣어 Voc와 FF를 개선하는 연구가 진행되고 있다. 이에 buffer layer의 활성화 정도를 높이기 위해 p-layer을 최적화 시키고자한다. 이 실험에서 a-Si:B에 N2O를 도핑시켜 Bandgap Energy 2.0 eV, Activation Energy 0.4 eV인 a-SiOx:B 막을 제작하여 buffer layer로 사용하였고 이 buffer layer에 의한 cell의 효율 향상을 최적화 하기위해 ASA simulation을 이용해 p-layer의 Bandgap Energy와 Activation Energy를 가변 하여 보았다. 실험결과 p-layer의 Bandgap Energy 1.95 eV에서 buffer layer와 p-layer사이에서의 barrier가 최소가 됨을 확인 할 수 있었고 Actication Energy 0.5 eV에서 가장 높은 Voc를 가짐을 알 수 있었다. 본 연구를 통해 p-layer의 Bandgap Energy 1.95 eV, Activation Energy 0.5 eV에서 buffer layer를 활성화시키기 위한 p-layer의 최적화 조건을 구현해 볼 수 있었다.