• The Transactions of the Korean Institute of Power Electronics
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• v.9 no.4
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• pp.334-340
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• 2004

In this paper, an efficient switching pattern to equalize the size of transformer is proposed for a multi-level inverter employing cascaded transformers. It is based on the prior selected harmonic elimination PWM(SHEPWM) method. Because the maximum magnetic flux imposed on each transformer becomes exactly equal each to each, all transformers can be designed with the same size regardless of their position. Therefore, identical full-bridge inverter units can be utilized, thus improving modularity and manufacturability. The fundamental idea of the proposed switching pattern is illustrated and then analyzed theoretically. The validity of the proposed switching strategy is verified by experimental results.

• Proceedings of the Korean Society of Marine Engineers Conference
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• 2005.06a
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• pp.1022-1028
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• 2005

This paper is presented the analysis results and simulation results of cascaded H-bridge 7 level inverter with various modulation index. Stepped waveform having number of switching was used to eliminate harmonic components. Switching angles according to modulation index are calculated numerically. Therefore, 3 times of switching with 7 level topology and QWS(Quarter Wave Symmetry) could eliminate 5th and 7th harmonics. The harmonic characteristics are compared to those of space vector modulation method which known as common modulation method in industrial field. Stepped waveform method showed higher ability to reduce, especially lower order of harmonics.

• Journal of Power Electronics
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• v.16 no.2
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• pp.490-497
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• 2016

The analysis of the switch status of each unit module of a cascaded multi-level inverter reveals that the working condition of the switch of a chopper arm causes unnecessary switching under the conventional unipolar sinusoidal pulse width modulation (SPWM). With an increase in the number of cascaded multilevel inverters, the superposition of unnecessary switching gradually occurs. In this work, we propose an improved SPWM strategy to reduce switching in cascaded multilevel inverters. Specifically, we analyze the switch state of the switch tube of a chopper arm of an H-bridge unit. The redundant switch is then removed, thereby reducing the switching frequency. Unlike the conventional unipolar SPWM technique, the improved SPWM method greatly reduces switching without altering the output quality of inverters. The conventional unipolar SPWM technique and the proposed method are applied to a five-level inverter. Simulation results show the superiority of the proposed strategy. Finally, a prototype is built in the laboratory. Experimental results verify the correctness of the proposed modulation strategy.

• The Transactions of the Korean Institute of Power Electronics
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• v.24 no.2
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• pp.120-126
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• 2019

This study proposes a neutral voltage balance control scheme for stable fault-tolerant operation of an active neutral point clamped (ANPC) inverter using carrier-based pulse width modulation. The proposed scheme maintains the neutral voltage balance by reconfiguring the switching combination and modulating the reference output voltage in order to solve the degradation of the output characteristic in the fault tolerant operation due to the fault of the power semiconductor switch constituting the ANPC inverter. The feasibility of the proposed control scheme is confirmed by HIL experiment using RT-BOX.

• Journal of Power Electronics
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• v.15 no.4
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• pp.910-919
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• 2015

The use of a PV grid-connected inverter with non-isolated topology and without a transformer is good for improving conversion efficiency; however, this inverter has become increasingly complicated for eliminating leakage current. To simplify the complicated architecture of traditional three-level dual buck inverters, a new dual Buck three-level PV grid-connected inverter topology is proposed. In the proposed topology, the voltage on the grounding stray capacitor is clamped by large input capacitors and is equal to half of the bus voltage; thus, leakage current can be eliminated. Unlike in the traditional topology, the current in the proposed topology passes through few elements and does not flow through the body diodes of MOSFET switches, resulting in increased efficiency. Additionally, a multi-loop control method that includes voltage-balancing control is proposed and analyzed. Both simulation and experimental results are demonstrated to verify the proposed structure and control method.

• Journal of Power Electronics
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• v.17 no.4
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• pp.1037-1047
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• 2017

The Differential Power Processing (DPP) converter is a promising multi-module photovoltaic inverter architecture recently proposed for photovoltaic systems. In this paper, a DPP converter architecture, in which each PV-panel has its own DPP converter in shunt, performs distributed maximum power point tracking (DMPPT) control. It maintains a high energy conversion efficiency, even under partial shading conditions. The system architecture only deals with the power differences among the PV panels, which reduces the power capacity of the converters. Therefore, the DPP systems can easily overcome the conventional disadvantages of PCS such as centralized, string, and module integrated converter (MIC) topologies. Among the various types of the DPP systems, the feed-forward method has been selected for both its voltage balancing and power transfer to a modified H-bridge inverter that needs charge balancing of the input capacitors. The modified H-bridge multi-level inverter had some advantages such as a low part count and cost competitiveness when compared to conventional multi-level inverters. Therefore, it is frequently used in photovoltaic (PV) power conditioning system (PCS). However, its simplified switching network draws input current asymmetrically. Therefore, input capacitors in series suffer from a problem due to a charge imbalance. This paper validates the operating principle and feasibility of the proposed topology through the simulation and experimental results. They show that the input-capacitor voltages maintain the voltage balance with the PV MPPT control operating with a 140-W hardware prototype.

• Proceedings of the Korean Institute of IIIuminating and Electrical Installation Engineers Conference
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• 2005.05a
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• pp.8-13
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• 2005

In this paper discusses single-phase DC-AC Inverter design of reversible power converter that driven by binary combination at different transformer winding ratio by BCD code level. It has a advantage that constructs a control system simply and obtain load current of good quality without filter circuit and free from noise or isolation for lower switching frequency. In this research, study on current type converter and inverter circuit that consist for possibility of AC-DC/DC-AC multi-level reversible converter.

• Proceedings of the KIEE Conference
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• 1989.07a
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• pp.515-517
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• 1989

This PWM inverter are used bridge circuit of two pair complementary transistor at each phase. The operation signals are 3 level PWM wave of W type and M type modulation, Which were obtained from switching time data by switching position calculation of triangular and sine wave. The output voltage waveforms of this inverter have the 5 level phase voltage and the 9 level line voltage of PWM.

• The Transactions of the Korean Institute of Power Electronics
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• v.11 no.3
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• pp.209-215
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• 2006

Now, in this paper, going to present you with an Idea related to a new inverter of multi-step voltage source, that Is, the double-connected 12-step inverter with an auxiliary circuit. It possibly can be 24-step inverter with 3-phase voltage source which will enable us make full application even to medium and high power-level Motor drive, UPS, STATCOM, SVC, etc. in which the PWM method could not be employed. 24-step operation can be obtained from the link between the existing 12-step inverter and the additional auxiliary circuit in which the transformer of auxiliary circuit generates ripple voltage delivered to the inverter. Through a lot of experiments and simulations, (from which the validity of this scheme is confirmed,) we came to the conclusion that the increase of the primary winding number on transformer by 2N(N=1,2,3....) leads to the 12M-step(M=2,3,4...) inverter. The validity of the proposed scheme is confirmed by the simulated and experimental results.

• Journal of Power Electronics
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• v.19 no.3
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• pp.702-713
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• 2019

Multilevel Inverters (MLIs) are widely used in medium voltage applications due to their various advantages. In addition, there are numerous types of MLIs for such applications. However, the diode-less 3-level (3L) T-type Neutral Point Clamped (NPC) MLI is the most advantageous due to its low conduction losses and high potential efficiency. The power circuit of a 3L T-type NPC is derived by the conventional two level inverter by a slight modification. In order to explore the MLI performance for various Pulse Width Modulation (PWM) schemes, this paper examines the operation of a 3L (five level line to line) T-type NPC MLI for various types of Multi-Carriers Pulse Width Modulation (MCPWM) schemes. These PWM schemes are compared in terms of their voltage profile, total harmonic distortion (THD) and conduction losses. In addition, a 3L T-type NPC MLI is also compared with the conventional NPC in terms of number of switches, clamping diodes, main diodes and capacitors. Moreover, the capacitor-balancing problem is also investigated using the Neutral Point Fluctuation (NPF) method with all of the MCPWM schemes. A 1kW 3L T-type NPC MLI is simulated in MATLAB/Simulink and implemented experimentally and its performance is tested with a 1HP induction motor. The results indicate that the 3L T-type NPC MLI has better performance than conventional NPC MLIs.