• 한국통신학회논문지
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• 제18권3호
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• pp.397-409
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• 1993

본 논문은 전류 모드 COMS 다치논리회로를 이용하여 CLA 방식에 의한 8비트 2진 병렬 가산기의 설계를 제안하였고, $5{\mu}m$의 표준 반도체 기술을 이용하여 시뮬레이션하였다. m치의 다치논리회로에 의한 CLA 방식의 가산기 설계시 필요한 발생캐리 $G_K$와 전달캐리 $P_K$의 검출조건을 유도하였고, 이를 4치에 적용하였다. 또한 4치 논리회로와 2진 논리회로의 결합에 의한 연산시 필요한 엔코더, 디코더, mod-4 가산회로, G_k및 P_k 검출회로, 전류-전압 변환회로를 CMOS로 설계하였다. 또한 시뮬레이션을 통해 각 회로의 동작을 검증하였으며, 다치회로의 장점을 이용한 2진 연산에 응용을 보여주었다. 순수한 2진 및 CCD-MVL에 의한 가산기와의 비교를 통해, 제안한 가산기는 1개의 LAC 발생기를 사용하여 1 level로 구성가능하며, 표준 CMOS 기술에 의한 4차 논리회로가 실현 가능하므로 다치논리회로의 유용성을 보였다.

• 전력전자학회:학술대회논문집
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• 전력전자학회 2006년도 전력전자학술대회 논문집
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• pp.203-205
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• 2006

This paper presents a novel soft-switching PWM utility frequency AC to high frequency AC power conversion circuit incorporating boost-half-bridge inverter topology, which is more suitable and acceptable for cost effective consumer induction heating applications. The operating principle and the operation modes are presented using the switching mode and the operating voltage and current waveforms. The performances of this high-frequency inverter using the latest IGBTs are illustrated, which includes high frequency power regulation and actual efficiency characteristics based on zero voltage soft switching (ZVS) operation ranges and the power dissipation as compared with those of the previously developed high-frequency inverter. In addition, a dual mode control scheme of this high frequency inverter based on asymmetrical pulse width modulation (PWM) and pulse density modulation (PDM) control scheme is discussed in this paper in order to extend the soft switching operation ranges and to improve the power conversion efficiency at the low power settings. The power converter practical effectiveness is substantially proved based on experimental results from practical design example.

• 대한전기학회:학술대회논문집
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• 대한전기학회 2002년도 하계학술대회 논문집 B
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• pp.1196-1198
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• 2002

A novel single-stage half-bridge high frequency resonant inverter using ZVS(Zero Voltage Switching) with high input power factor suitable for induction heating applications is presented in this paper. The proposed high frequency resonant inverter integrates half-bridge boost rectifier as power factor corrector(PFC) and half-bridge resonant inverter into a single stage. The input stage of the half-bridge boost rectifier is working in discontinuous conduction mode (DCM) with constant duty cycle and variable switching frequency. So that a high power factor is achieved naturally. Simulation results through the Pspice have demonstrated the feasibility of the proposed inverter. This proposed inverter will be able to be practically used as a power supply in various fields as induction heating applications, DC-DC converter etc.

• 한국통신학회논문지
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• 제36권11A호
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• pp.933-940
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• 2011

본 논문에서는 도로 장애물 감시 레이더용 Ka 대역 송수신기를 설계 및 제작하였다. 도로 장애물 감시 레이더용 송수신기는 파형발생기, 주파수발생기, IF 송수신기, RF 상하향 변환기로 구성되어 있다. 송수신기는 탐지 거리별로 모드를 3가지로 구분하여 운용되며 이 때 Ka 대역에서 150MHz의 대역폭을 유지한다. 송신 출력은 22dBm 이상이며, 수신 이득은 30dB, 잡음 지수는 6dB인 성능을 얻었다. 수신 동적 범위는 63.28dB 이며, 수신 I/Q 채널 간 진폭 오차는 0.3dB, 위상 오차는 1.74도를 보였다. 시험 결과, 송수신기는 펄스 도플러 형태의 도로 감시 레이더에서 요구되는 전기적인 성능을 만족하였음을 확인하였다.

• 한국산학기술학회논문지
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• 제13권11호
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• pp.5409-5415
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• 2012

압전 세라믹 액추에이터는 스프레이, 디스펜서, 밸브제어와 같은 다양한 산업제품들에 응용된다. 압전 세라믹 소자의 기계적인 변위의 크기는 인가 전압의 크기에 의해 정해지므로, 압전 세라믹 액추에이터 구동을 위해서는 고전압 전원장치와 함께 전력증폭기가 필요하다. 본 논문에서는 간단하고 크기가 작은 H-브리지 형태의 전력증폭기와 플라이백 고전압 스위칭 모드 전원장치를 개발하였다. H-브리지 형태의 전력증폭기는 펄스폭 변조를 이용하여 압전 세라믹 액추에이터에 대한 에너지 입력의 크기를 쉽게 조절할 수 있다는 장점이 있다.

• Journal of Positioning, Navigation, and Timing
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• 제4권3호
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• pp.115-122
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• 2015

Global Positioning System (GPS) is used in various fields such as communications systems, transportation systems, e-commerce, power plant systems, and up to various military weapons systems recently. However, GPS receiver is vulnerable to jamming signals as the GPS signals come from the satellites located at approximately 20,000 km above the earth. For this reason, various anti-jamming techniques have been developed for military application systems especially and it is also required for commercial application systems nowadays. In this paper, we proposed a dual-channel Global Navigation Satellite System (GNSS) RF ASIC for digital pre-correlation anti-jam technique. It not only covers all GNSS frequency bands, but is integrated low-gain/attenuation mode in low-noise amplifier (LNA) without influencing in/out matching and 14-bit analogdigital converter (ADC) to have a high dynamic range. With the aid of digital processing, jamming to signal ratio is improved to 77 dB from 42 dB with proposed receiver. RF ASIC for anti-jam is fabricated on a 0.18-μm complementary metal-oxide semiconductor (CMOS) technology and consumes 1.16 W with 2.1 V (low-dropout; LDO) power supply. And the performance is evaluated by a kind of test hardware using the designed RF ASIC.

• Journal of Power Electronics
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• 제17권2호
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• pp.551-560
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• 2017

The present study proposes an angle droop controller for converter interfaced (dispatchable) distributed generation (DG) resources in the islanded mode of operation. Due to the necessity of proper real and reactive power sharing between different types of resources in microgrids and the ability of systems to respond properly to abnormal conditions (sudden load changes, load uncertainty, load current disturbances, transient conditions, etc.), it is necessary to produce appropriate references for all of the mentioned above conditions. The proposed control strategy utilizes a current controller in addition to an angle droop controller in the discrete time domain to generate appropriate responses under transient conditions. Furthermore, to reduce the harmonics caused by switching at converters' output, a LCL filter is used. In addition, a comparison is done on the effects that LCL filters and L filters have on the performance of DG units. The performance of the proposed control strategy is demonstrated for multi islanded grids with various types of loads and conditions through simulation studies in the DigSilent Power Factory software environment.

• 전력전자학회논문지
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• 제9권3호
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• pp.260-266
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• 2004

EMI필터는 주로 시행착오 법에 의해서 설계하기 때문에, 전력변환기기의 전도 EMI를 감쇠시키기 위해서는 많은 시간을 요하게 된다. 따라서 본 논문에서는 이러한 문제를 극복하기 위해서 EMI 필터에 대한 새로운 분석적인 설계절차를 제안한다. 각 부품에 대한 고주파 모델을 구성하고, 이러한 모델링 회로를 이용하여 각 모드에 적용할 수 있는 필터를 설계한다. 실제 사용되는 부품에 대한 축적된 데이터 베이스와 표준필터를 적용한 EUT(Equipment Under Test)의 측정 데이터를 기초로 해서 필터를 설계하는 알고리즘을 제안한다. 끝으로, 측정결과를 통해서 제안된 모델과 설계방법의 타당성을 확인한다.

• 전력전자학회논문지
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• 제4권5호
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• pp.423-432
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• 1999

This paper proposes a 12­pulse diode rectifier system with low kVA components suitable for powering switch mode power supplies or ac/dc converter applications. The proposed 12-pulse system employs a polyphase transformer, a zero sequence blocking transformer (ZSBT) in the dc link, and an interphase transformer. Results produce near equal leakage inductance in series with each diode rectifier bridge ensuring equal current sharing and performance improvements, The utility input currents and the voltage across the ZSBT are analyzed the kVA rating of each component in the proposed system is computed. The 5th , 7th , 17th and 19th harmonics are eliminated in the input line currents resulting in clean input power. The dc link voltage magnitude generated by the proposed rectifier system is nearly identical to a conventional to a conventional 6-pulse system. The proposed system is suitable to retrofit applications as well as in new PWM drive systems. Simulation and experimental results from a 208V , 10kVA system are shown.

• 전력전자학회:학술대회논문집
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• 전력전자학회 2001년도 Proceedings ICPE 01 2001 International Conference on Power Electronics
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• pp.457-461
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• 2001

Advantages of switched reluctance motor(SRM) drives make it an attractive candidate for replacing adjustable speed ac and dc drives in both industrial and consumer applications. Furthermore, a simple, low cost and robust SRM drive can be efficiently operated in the hostile environment of an automobile. Generally, the speed control of SRM has a large step change or large torque reference, the output of its PI controller is often saturated. When this happens, the integral state is not consistent with the SRM input, while may give rise to the windup phenomenon. This paper proposes anti-windup control method for SRM speed control system by hysteresis current controlled asymmetry bridge converter. The experimental results show that the speed response has much improved performance, such as a small overshoot and fast settling time at the acceleration and particulary deceleration period with braking mode.