• Title/Summary/Keyword: mobile application processor

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Design of Embedded Processor Architecture Applicable to Mobile Multimedia (Mobile Multimedia 지원을 위한 Embedded Processor 구조 설계)

  • 이호석;한진호;배영환;조한진
    • Journal of the Institute of Electronics Engineers of Korea SD
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    • v.41 no.5
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    • pp.71-80
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    • 2004
  • This paper describes embedded processor architecture design which is applicable to multimedia in mobile platform The main description is based on basic processor architecture and consideration about energy efficiency when used in mobile platform To design processor data path architecture (pipeline, branch prediction, multiple issue superscalar, function unit number) which is optimal to multimedia application and cache hierarchy and its structure, we have nut the simulation with variant architecture using MPEG4 test bench as multimedia application. We analyzed energy efficiency of architecture to check if it is applicable to mobile platform and decide basic processor architecture based on analysis result. The suggested basic processor architecture not only can be applied to mobile platform but also can be applied to basic processor architecture of configurable processor which is designed through automatic design environment.

Application-Adaptive Performance Improvement in Mobile Systems by Using Persistent Memory

  • Bahn, Hyokyung
    • International journal of advanced smart convergence
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    • v.8 no.1
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    • pp.9-17
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    • 2019
  • In this article, we present a performance enhancement scheme for mobile applications by adopting persistent memory. The proposed scheme supports the deadline guarantee of real-time applications like a video player, and also provides reasonable performances for non-real-time applications. To do so, we analyze the program execution path of mobile software platforms and find two sources of unpredictable time delays that make the deadline-guarantee of real-time applications difficult. The first is the irregular activation of garbage collection in flash storage and the second is the blocking and time-slice based scheduling used in mobile platforms. We resolve these two issues by adopting high performance persistent memory as the storage of real-time applications. By maintaining real-time applications and their data in persistent memory, I/O latency can become predictable because persistent memory does not need garbage collection. Also, we present a new scheduler that exclusively allocates a processor core to a real-time application. Although processor cycles can be wasted while a real-time application performs I/O, we depict that the processor utilization is not degraded significantly due to the acceleration of I/O by adopting persistent memory. Simulation experiments show that the proposed scheme improves the deadline misses of real-time applications by 90% in comparison with the legacy I/O scheme used in mobile systems.

A Low Power UHF RFID Baseband Processor for Mobile Readers (모바일용 저전력 UHF RFID 기저대역 프로세서)

  • Bae, Sung Woo;Park, Jun-Seok;Seong, Yeong Rak;Oh, Ha-Ryoung
    • The Transactions of The Korean Institute of Electrical Engineers
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    • v.63 no.1
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    • pp.85-91
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    • 2014
  • As RFID is utilized more frequently and diversely in terms of its application areas, the application of mobile RFID technology, which integrates cellular networks and RFID, is highly anticipated. The growth and development of the RFID field has bolstered the development of mobile RFID chips to be embedded in mobile phones. Because mobile RFID chips are embedded in cell phones, limitations such as low power, small form factor, and costliness must be confronted. This study presents the design of a RFID digital baseband processor that is suitable for mobile readers. The RF analog component, which affects the baseband signals, is designed separately, in consideration of the limitations stated above. The function of the baseband processor was verified through simulations and prototyped using FPGA. The power consumption of the chip is 20mW under a 20MHz clock and the chip measures $3mm{\times}3mm$.

Implementation of Mobile WiMAX Receiver using Mobile Computing Platform for SDR System (모바일 컴퓨팅 플랫폼을 이용한 SDR 기반 MOBILE WIMAX 수신기 구현)

  • Kim, Han Taek;Ahn, Chi Young;Kim, June;Choi, Seung Won
    • Journal of Korea Society of Digital Industry and Information Management
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    • v.8 no.1
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    • pp.117-123
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    • 2012
  • This paper implements mobile Worldwide Interoperability for Microwave Access (WiMAX) receiver using Software Defined Radio (SDR) technology. SDR system is difficult to implement on the mobile handset because of restrictions that are computing power and under space constraints. The implemented receiver processes mobile WiMAX software modem on Open Multimedia Application Platform (OMAP) System on Chip (SoC) and Field Programmable Gate Array (FPGA). OMAP SoC is composed of ARM processor and Digital Signal Processor (DSP). ARM processor supports Single Instruction Multiple Data (SIMD) instruction which could operate on a vector of data with a single instruction and DSP is powerful image and video accelerators. For this reason, we suggest the possibility of SDR technology in the mobile handset. In order to verify the performance of the mobile WiMAX receiver, we measure the software modem runtime respectively. The experimental results show that the proposed receiver is able to do real-time signal processing.

Comparison of Machine Learning Tools for Mobile Application

  • Lee, Yo-Seob
    • International Journal of Advanced Culture Technology
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    • v.10 no.3
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    • pp.360-370
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    • 2022
  • Demand for machine learning systems continues to grow, and cloud machine learning platforms are widely used to meet this demand. Recently, the performance improvement of the application processor of smartphones has become an opportunity for the machine learning platform to move from the cloud to On-Device AI, and mobile applications equipped with machine learning functions are required. In this paper, machine learning tools for mobile applications are investigated and compared the characteristics of these tools.

Design of DC-DC Buck Converter Using Micro-processor Control (마이크로프로세서 제어를 이용한 DC-DC Buck Converter 설계)

  • Jang, In-Hyeok;Han, Ji-Hun;Lim, Hong-Woo
    • Journal of Advanced Engineering and Technology
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    • v.5 no.4
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    • pp.349-353
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    • 2012
  • Recently, Mobile multimedia equipments as smart phone and tablet pc requirement is increasing and this market is also being expanded. These mobile equipments require large multi-media function, so more power consumption is required. For these reasons, the needs of power management IC as switching type dc-dc converter and linear regulator have increased. DC-DC buck converter become more important in power management IC because the operating voltage of VLSI system is very low comparing to lithium-ion battery voltage. There are many people to be concerned about digital DC-DC converter without using external passive device recently. Digital controlled DC-DC converter is essential in mobile application to various external circumstance. This paper proposes the DC-DC Buck Converter using the AVR RISC 8-bit micro-processor control. The designed converter receives the input DC 18-30 [V] and the output voltage of DC-DC Converter changes by the feedback circuit using the A/D conversion function. Duty ratio is adjusted to maintain a constant output voltage 12 [V]. Proposed converter using the micro-processor control was compared to a typical boost converter. As a result, the current loss in the proposed converter was reduced about 10.7%. Input voltage and output voltage can be displayed on the LCD display to see the status of the operation.

Trends of Mobile GPU (모바일 GPU 동향)

  • Han, J.H.;Byun, J.G.;Eum, N.W.
    • Electronics and Telecommunications Trends
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    • v.28 no.2
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    • pp.50-57
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    • 2013
  • 스마트폰 및 태블릿 PC에 들어가는 핵심 부품인 AP(Application Processor)는 모두 GPU(Graphics Processing Unit)를 내장하고 있다. 이는 칩 면적의 제약과 사용 가능한 전력의 한계로 데스크톱의 그래픽 카드에 탑재된 고성능 GPU와는 다른 설계 제약을 받는다. 본고에서는 고성능 GPU와 다른 설계 조건을 갖는 mobile GPU 기술에 대해서 알아보았고 대표적인 commercial mobile GPU인 Imagination, ARM, Qualcomm, NVidia사의 mobile GPU의 특징 및 성능에 대해서 알아보았다.

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Design of Scan Conversion Processor for 3-Dimensional Mobile Graphics Application (3차원 모바일 그래픽 응용을 위한 스캔 변환 프로세서의 설계)

  • Choi, Byeong-Yoon;Ha, Chang-Soo;Salcic, Zoran
    • Journal of the Korea Institute of Information and Communication Engineering
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    • v.11 no.11
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    • pp.2107-2115
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    • 2007
  • In this paper, the scan conversion processor which converts the triangle represented by three vertices into pixel-level screen coordinates, depth coordinate, and color data is designed. The processor adopts scan-line algorithm which decomposes triangle into horizontal spans and then transforms the span into pixel data. By supporting top-left filling convention, it ensures that triangles that share an edge do not produce any dropouts or overlaps between adjacent polygons. It consists of about 21,400 gates and its maximum operating frequency is about 80 Mhz under 0.35um CMOS technology. Because its maximum pixel rate is about 80 Mpixels/sec, it can be applicable to mobile graphics application.

A Study on Next Generation IT Fields Application of Embedded Systems (임베디드시스템의 차세대 IT 분야 응용에 관한 연구)

  • Park, Chun-Myoung
    • Proceedings of the Korean Institute of Information and Commucation Sciences Conference
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    • 2012.05a
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    • pp.840-841
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    • 2012
  • This paper represent a method of next generation IT fields of embedded systems. we discuss the background why the embedded systems is the importance in the next generation IT fields. Also, we describe the hardware oriented embedded systems, the embedded hardware processor, specified processor. And we discuss the embedded system application fields, i.e. mobile phone application, STB application, telematics fields, home automation, personal digital assistant and so on.

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Implementation of SIMD-based Many-Core Processor for Efficient Image Data Processing (효율적인 영상데이터 처리를 위한 SIMD기반 매니코어 프로세서 구현)

  • Choi, Byong-Kook;Kim, Cheol-Hong;Kim, Jong-Myon
    • Journal of the Korea Society of Computer and Information
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    • v.16 no.1
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    • pp.1-9
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    • 2011
  • Recently, as mobile multimedia devices are used more and more, the needs for high-performance and low-energy multimedia processors are increasing. Application-specific integrated circuits (ASIC) can meet the needed high performance for mobile multimedia, but they provide limited, if any, generality needed for various application requirements. DSP based systems can used for various types of applications due to their generality, but they require higher cost and energy consumption as well as less performance than ASICs. To solve this problem, this paper proposes a single instruction multiple data (SIMD) based many-core processor which supports high-performance and low-power image data processing while keeping generality. The proposed SIMD based many-core processor composed of 16 processing elements (PEs) exploits large data parallelism inherent in image data processing. Experimental results indicate that the proposed SIMD-based many-core processor higher performance (22 times better), energy efficiency (7 times better), and area efficiency (3 times better) than conversional commercial high-performance processors.