• 한국수소및신에너지학회논문집
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• 제2권1호
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• pp.47-56
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• 1990

Pure titanium rods were oxidized by anodic oxidation, furnace oxidation and flame oxidation and used as a electrode in the photodecomposition of water. The maximum photoelectrochemical conversion efficiency(${\eta}$) was found for flame oxidized electrode ($1200^{\circ}C$ for 2 min in air), 0.8 %. Anodically oxidized electrodes have minimum photoelectrochemical conversion efficiencies, 0.3 %. Furnace oxidized electrode ($800^{\circ}C$ for 10min in air) has 0.5% phtoelectrochemical efficiency and shows a band-gap energy of about 2.9eV. The efficiency shows a parallelism with the presence of the metallic interstitial compound $TiO_{O+X}$(X < 0.33) at the metal-semiconductor interface, the thickness of the sub oxide layer and that of the external rutile scale.

• 한국정밀공학회:학술대회논문집
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• 한국정밀공학회 2005년도 춘계학술대회 논문집
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• pp.434-437
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• 2005

Chemical Mechanical Polishing (CMP) has become an essential step in the overall semiconductor wafer fabrication technology. In general, CMP is a surface planarization method in which a silicon wafer is rotated against a polishing pad in the presence of slurry under pressure. The polishing pad, generally a polyurethane-based material, consists of polymeric foam cell walls, which aid in removal of the reaction products at the wafer interface. It has been found that the material removal rate of any polishing pad decreases due to the so-called 'pad glazing' after several wafer lots have been processed. Therefore, the pad restoration and conditioning has become essential in CMP processes to keep the urethane polishing pad at the proper friction coefficient and to allow effective slurry transport to the wafer surface. Diamond pad conditioner employs a single layer of brazed bonded diamond crystals. Due to the corrosive nature of the polishing slurry required in low pH metal CMP such as copper, it is essential to minimize the possibility of chemical interaction between very low pH slurry (pH <2) and the bond alloy. In this paper, we report an exceptional protective coated conditioner for in-situ pad conditioning in low pH Cu CMP process. The protective Cr-coated conditioner has been tested in slurry with pH levels as low as 1.5 without bond degradation.

• 한국진공학회:학술대회논문집
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• 한국진공학회 2013년도 제44회 동계 정기학술대회 초록집
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• pp.662-662
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• 2013

Over the last several decades, innovative light-harvesting devices have evolved to achieve high efficiency in solar energy transfer. Research on the mechanisms for plasmon resonance is very desirable to overcome the conventional efficiency limits of photovoltaics. The influence of localized surface plasmon resonance on hot electron flow at a metal-semiconductor interface was observed with a Schottky diode composed of a thin silver layer on $TiO_2$. The photocurrent is generated by absorption of photons when electrons have enough energy to travel over the Schottky barrier and into the titanium oxide conduction band. The correlation between the hot electrons and the surface plasmon is confirmed by matching the range of peaks between the incident photons to current conversion efficiency (IPCE, flux of collected electrons per flux of incident photons) and UV-Vis spectra. The photocurrent measured on Ag/$TiO_2$ exhibited surface plasmon peaks; whereas, in contrast to the Au/$TiO_2$, a continuous Au thin film doesn't exhibit surface plasmon peaks. We modified the thickness and morphology of a continuous Ag layer by electron beam evaporation deposition and heating under gas conditions and found that the morphological change and thickness of the Ag film are key factors in controlling the peak position of light absorption.

• 한국진공학회:학술대회논문집
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• 한국진공학회 2013년도 제44회 동계 정기학술대회 초록집
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• pp.597-597
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• 2013

The resistive switching behaviors of Pt nanodisk on Nb-doped SrTiO3 single-crystal have been studied with conductive atomic force microscopy in ultra-high vacuum. The nanometer sizes of Pt disks were formed by using self-assembled patterns of silica nanospheres on Nb-doped SrTiO3 single-crystal semiconductor film using the Langmuir-Blodgett, followed by the metal deposition with e-beam evaporation. The conductance images shows the spatial mapping of the current flowing from the TiN coated AFM probe to Pt nanodisk surface on Nb：STO single-crystal substrate, that was simultaneously obtained with topography. The bipolar resistive switching behaviors of Pt nanodisk on Nb：STO single-crystal junctions was observed. By measuring the current-voltage spectroscopy after the forming process, we found that switching behavior depends on the charging and discharging of interface trap state that exhibit the high resistive state (HRS) and low resistive state (LRS), respectively. The results suggest that the bipolar resistive switching of Pt/Nb:STO single-crystal junctions can be performed without the electrochemical redox reaction between tip and sample with the potential application of nanometer scale resistive switching devices.

• 한국군사과학기술학회지
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• 제4권2호
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• pp.122-129
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• 2001

A characterization procedure for analyzing symmetric coupled MIS(Metal-Insulator-Semiconductor) transmission line is used the same procedure as a general single layer symmetric coupled line with perfect dielectric substrate from the extraction of the characteristic impedance and propagation constant for even- and odd-mode. In this paper, an analysis for a new substrate shielding symmetric coupled MIS structure consisting of grounded crossbar at the interface between Si and SiO2 layer using the Finite- Difference Time-Domain(FDTD) method is presented. In order to reduce the substrate effects on the transmission line characteristics, a shielding structure consisting of grounded crossbar lines over time-domain signal has been examined. Symmetric coupled MIS transmission line parameters for even- and odd-mode are investigated as the functions of frequency, and the extracted distributed frequency- dependent transmission line parameters and corresponding equivalent circuit parameters as well as quality factor for the new MIS crossbar embedded structure are also presented. It is shown that the quality factor of the symmetric coupled transmission line can be improved without significant change in the characteristic impedance and effective dielectric constant.

• 한국전기전자재료학회:학술대회논문집
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• 한국전기전자재료학회 2001년도 하계학술대회 논문집
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• pp.58-61
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• 2001

Metal-insulator-semiconductor (MIS) C-V properties with high dielectric AIN thin films showed no hysteresis and good interface properties. The dielectric constant of the AIN film calculated from the capacitance at the accumulation region in the capacitance-voltage(C-V) characteristics was about 8. The C-V characteristics of MFIS capacitor showed a hysteresis loop due to the ferroelectric nature of the LiNbO$_3$ thin films. Typical dielectric constant value of LiNbO$_3$ film of MFIS device was about 23. The memory window width was about 1.2V at the gate voltage of $\pm$5 V ranges. Typical gate leakage current density of the MFIS structure was the order of 10$^{-9}$ A/cm$^2$ at the range of within $\pm$500 kV/cm. The ferroelectric capacitors showed no polarization degradation up to about 10$^{11}$ switching cycles when subjected to symmetric bipolar voltage pulse(peak-to-peak 8V, 50% duty cycle) in the 500kHz.

• 대한전기학회논문지
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• 제44권4호
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• pp.483-489
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• 1995

To investigate the mechanism generated by irradiation in the insulator layer irradiated MIS (Metal - Insulator - Semiconductor) device, the various types of MIS capacitors depending on insulator thickness, insulator types and implanted impurities are fabricated on the P-type wafer. MIS capacitors exposed by 1Mrad Co$^{60}$ .gamma.-ray are measured for flat band voltage and charge density shifts pre- and post-irradiation. The measuring results of post-irradiation show the flat band voltage shifting toward negative direction and charge density increasing regardless of parameters. This results have a good agreement with calculated data by computer simulation. Si$_{3}$N$_{4}$ layers have a good radiation-hardness than SiO$_{2}$ layers compared to the results of post-irradiation. Also, radiation-induced negative trap is discovered in the implanted insulator layer. Using numerical analysis, four continuty equations (conduction-band electrons continuity equation, valence-band holes continuity equation, trapped electrons continuity equation, trapped holes continuity equation) are solved and charge distributions according to the distance and Si-Insulator interface states are investigated.

• 대한전기학회:학술대회논문집
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• 대한전기학회 1993년도 하계학술대회 논문집 B
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• pp.1274-1276
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• 1993

The silicon-nitride films formed by laser CVD method are used for passivating GaAs surfaces. The electrical Properties of metal-insulator-GaAs structure are studied to determined the interfacial characteristics by C-V curves and deep level transient spectroscopy(DLTS). The SiN films are photolysisly deposited from $SiH_4\;and\;NH_3$ in the range of $100^{\circ}C-300^{\circ}C$ on P type, (100) GaAs. The hysteresis is reduced and interface trap density is lowered to $10^{12}-10^{13}$ at $100^{\circ}C-200^{\circ}C$. The surface leakage current is studied too. The passivated GaAs have a little leakage current compared to non passivated GaAs.

• 한국정밀공학회지
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• 제18권12호
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• pp.192-199
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• 2001

Chemical mechanical planarization (CMP) has emerged as the planarization technique of choice in both front-end and back-end integrated circuit manufacturing. Conventional CMP process utilize a polyurethane polishing pad and liquid chemical slurry containing abrasive particles. There hale been serious problems in CMP in terms of repeatability and deflects in patterned wafers. Especial1y, dishing and erosion defects increase the resistance because they decrease the interconnection section area, and ultimately reduce the lifetime of the semiconductor. Methods to reduce dishing & erosion have recently been interface hardness of the pad, optimization of the pattern structure as dummy patterns. Dishing & erosion are initially generated an uneven pressure distribution in the materials. These defects are accelerated by free abrasives and chemical etching. Therefore, it is known that dishing & erosion can be reduced by minimizing the abrasive concentration. Minimizing the abrasive concentration by using CeO$_2$is the best solution for reducing dishing & erosion and for removal rate. This paper introduce dishing & erosion generating mechanism and a method fur developing a semi-rigid abrasive pad to minimize dishing & erosion during CMP.

• 마이크로전자및패키징학회지
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• 제24권4호
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• pp.39-46
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• 2017

본 연구는 평판형 히터용 금속방열판상의 세라믹 절연층 제조, 즉 절연성 금속기판에 관한 것이다. 반도체나 디스플레이의 열처리 공정 등에 사용되는 평판형 히터를 제조함에 있어서, 온도 균일도를 높이기 위해 금속 방열판으로서 열전도율이 높고, 비교적 가벼우며, 가공성 좋은 알루미늄 합금 기판이 선호된다. 이 알루미늄 기판에 발열 회로 패턴을 형성하기 위해서는 금속 기판에 절연층으로서 고온 안정성이 우수한 세라믹 유전체막을 코팅하여야 한다. 금속 기판상에 세라믹 절연층을 형성함에 있어서 가장 빈번히 발생하는 첫 번째 문제는 금속과 세라믹의 이종재료 간의 큰 열팽창계수 차이와 약한 결합력에 의한 층간박리 및 균열발생이다. 두 번째 문제는 절연층의 소재 및 구조적 결함에 따른 절연파괴이다. 본 연구에서는 이러한 문제점 해소를 위해 금속소재 기판과 세라믹 절연층 사이에 완충층을 도입하여 이들 간의 기계적 매칭과 접합력 개선을 도모하였고, 다중코팅 방법을 적용하여 절연막의 품질과 내전압 특성을 개선하고자 하였다.