• Journal of the Korean Institute of Electrical and Electronic Material Engineers
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• v.21 no.8
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• pp.711-714
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• 2008

Metal-oxide-semiconductor (MOS) capacitors were fabricated to investigate the plasma damage caused by reactive ion etching (RIE) on (100) oriented silicon-on-insulator (SOI) substrates. The thickness of the top-gate oxide, SOI, and buried oxide layers were 10 nm, 50 nm, and 100 nm, respectively. The MOS/SOI capacitors with an etch-damaged SOI layer were characterized by capacitance-voltage (C-V) measurements and compared to the sacrificial oxidation treated samples and the reference samples without etching. The measured C-V curves were compared to the numerical results from corresponding 2-dimensional (2-D) structures by using a Silvaco Atlas simulator.

• Proceedings of the IEEK Conference
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• 1999.11a
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• pp.191-194
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• 1999

Switching behaviour of the ferroelectric thin film and device characteristics of the MFSFET (Metal-Ferroelectric-Semiconductor FET) are simulated with taking into account the accumulation of oxygen vacancies near interface between the ferroelectric thin film and the bottom electrode caused by the progress of fatigue. We show net switching current decreases due fatigue in the switching model. It indicates that oxygen vacancy strongly suppresses polarization reversal. The difference of saturation drain current of the device before fatigue is shown by the dual threshold voltages in I$_{D}$-V$_{D}$ curve as 6㎃/$\textrm{cm}^2$ and decreases as much as 50% after fatigue. Our simulation model is expected to play an important role in estimation of the behavior of MFSFET device with various ferroelectric thin films.lms.

• Proceedings of the IEEK Conference
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• 1999.11a
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• pp.216-219
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• 1999

A simple two-terminal cyclic current-voltage(I-V) technique is used to measure the current-transients in MOS capacitors. Distinct charging/discharging currents were measured and analyzed as a function of (1) the hold time. (2) the gate polarity during the FNT electron injection, (3) the injection fluence and (4) the annealing time after the injection had stopped. Discharging and charging current-transients were strongly dependent upon the conditions for forming the inversion layer and the density of interface traps caused during the FNT electron injection, respectively. Several tentative mechanisms were suggested in the current work.

• Journal of the Korean Institute of Electrical and Electronic Material Engineers
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• v.16 no.10
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• pp.865-870
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• 2003

The MFIS (Metal-Ferroelectric-Insulator-Semiconductor) capacitors were fabricated using a metalorganic decomposition method. Thin layers of CeO$_2$ were deposited as a buffer layer on Si substrate and BLT thin films were used as a ferroelectric layer. The electrical and structural properties of the MFIS structure were investigated. X -ray diffraction was used to determine the phase of the BLT thin films and the quality of the CeO$_2$ layer. The morphology of films and the interface structures of the BLT and the CeO$_2$ layers were investigated by scanning electron microscopy. The width of the memory window in the C-V curves for the MFIS structure is 2.82 V. The experimental results show that the BLT-based MFIS structure is suitable for non-volatile memory FETs with large memory window.

• Proceedings of the KIEE Conference
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• 1990.07a
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• pp.261-264
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• 1990

The specific contact resistance(SCR) of metal-semiconductor interface is an important design parameter for VLSI interconnecting technology. As the critical feature size of the integrated structures decrease, the physical size of ohmic contacts will also decrease and the series contact resistance will increase. Al-Si contacts on the annealing condition are studied. The propreties of the contacts depend considerably on the annealing procedures. Barrier height is measured from Capacitance-Voltage characteristics. The specific contact resistance are analyzed using a modified four point method.

• Journal of the Korean Institute of Electrical and Electronic Material Engineers
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• v.11 no.10
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• pp.778-783
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• 1998

Film characteristics of thin ONO dielectric layers for MONOS(metal-oxide-nitride-oxide-semiconductor) EEPROM was investigated by TEM, AES and AFM. Seocnd derivative spectra of Auger Si LVV overlapping peak provide useful information fot chemical state analysis of superthin film. The ONO film with dimension of tunnel oxide 23$\AA$, nitride 33$\AA$, and blocking oxide 40$\AA$ was fabricated. During deposition of the LPCVD nitride film on tunnel oxide, this thin oxide was nitrized. When the blocking oxide was deposited on the nitride film, the oxygen not only oxidized the nitride surface, but diffused through the nitride. The results of ONO film analysis exhibits that it is made up of $SiO_2$ (blocking oxide)/O-rich SiON(interface)/N-rich SiON(nitride)/ O-rich SiON(tunnel oxide)

• Applied Microscopy
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• v.36 no.spc1
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• pp.25-33
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• 2006

Nanofabrication with finely focused ion and electron beams is reviewed, and position and size controlled fabrication of nano-metals and -semiconductors is demonstrated. A focused ion beam (FIB) interface attached to a column of 200keV transmission electron microscope (TEM) was developed. Parallel lines and dots arrays were patterned on GaAs, Si and $SiO_2$ substrates with a 25keV $Ga^+-FIB$ of 200nm beam diameter at room temperature. FIB nanofabrication to semiconductor specimens caused amorphization and Ga injection. For the electron beam induced chemical vapor deposition (EBI-CVD), we have discovered that nano-metal dots are formed depending upon the beam diameter and the exposure time when decomposable gases such as $W(CO)_6$ were introduced at the beam irradiated areas. The diameter of the dots was reduced to less than 2.0nm with the UHV-FE-TEM, while those were limited to about 15nm in diameter with the FE-SEM. Self-standing 3D nanostructures were also successfully fabricated.

• The Transactions of the Korean Institute of Power Electronics
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• v.22 no.2
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• pp.109-117
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• 2017

This paper describes the design and implementation of a unit module for a 10 kVA class 13.2 kV/220 V unidirectional solid-state transformer (SST) with silicon-carbide metal-oxide-semiconductor field-effect transistors. The proposed module consists of an active-front-end (AFE) converter to interface 1320 V AC voltage source to 2500 V DC link and an isolated resonant DC-DC converter for 500 V low-voltage DC output. The design approaches of the AFE and the isolated resonant DC-DC converters are addressed. The control structures of the converters are described as well. The experiments for the converters are performed, and results verify that the proposed unit module can be successfully adopted for the entire SST operation.

• Proceedings of the Korean Institute of Electrical and Electronic Material Engineers Conference
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• 2005.07a
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• pp.21-22
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• 2005

Partially-depleted Silicon on insulator metal-oxide-semiconductor field- effect transistors (PD-SOI MOSFETs) with Silicon-germanium (SiGe) layer is investigated. This structure uses SiGe layer to reduce the kink effect in the floating body region near the bottom channel/buried oxide interface. Among many design parameters influencing the performance of the device, Ge composition is presented most predominant effects, simulation results show that kink effect is reduced with increase the Ge composition. Because the bandgap of SiGe layer is reduced at higher Ge composition, the hole current between body and SiGe layer is enhanced.

• Journal of Sensor Science and Technology
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• v.33 no.1
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• pp.12-17
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• 2024

Floating inverter amplifiers (FIAs) have recently garnered considerable attention owing to their high energy efficiency and inherent resilience to input common-mode voltages and process-voltage-temperature variations. Since the voltage gain of a simple FIA is low, it is typically cascaded or cascoded to achieve a higher voltage gain. However, cascading poses stability concerns in closed-loop applications, while cascoding limits the output swing. This study introduces a gain-enhanced FIA that features cross-coupled body biasing. Through simulations, it is demonstrated that the proposed FIA designed using a 28-nm complementary metal-oxide-semiconductor technology with a 1-V power supply can achieve a high voltage gain (> 90 dB) suitable for dynamic open-loop applications. The proposed FIA can also be used as a closed-loop amplifier by adjusting the amount of positive feedback due to the cross-coupled body biasing. The capability of achieving a high gain with minimum-length devices makes the proposed FIA a promising candidate for low-power, high-speed sensor interface systems.