• Title/Summary/Keyword: memory testing

Search Result 246, Processing Time 0.035 seconds

A Study on the Test Circuit Design and Development of Algorithm for Parallel RAM Testing (RAM의 병렬 테스팅을 위한 알고리듬개발 및 테스트회로 설계에 관한 연구)

  • 조현묵;백경갑;백인천;차균현
    • The Journal of Korean Institute of Communications and Information Sciences
    • /
    • v.17 no.7
    • /
    • pp.666-676
    • /
    • 1992
  • In this paper, algorithm and testable circuit to find all PSF(Pattern Sensitive Fault ) occured in RAM were proposed. Conventional test circuit and algorithm took much time in testing because consecutive test for RAM cells or f-dimensional memory struciure was not employed. In this paper, methodology for parallel RAM-testing was proposed by compensating additional circuit for test to conventional RAM circuit. Additional circuits are parallel comparator, error detector, group selector circuit and a modified decoder used for parallel testing. And also, the constructive method of Eulerian path to obtain efficient test pattern was performed. Consequently, If algorithm proposed in this paper Is used, the same operations as 32sxwor4 lines will be needed to test b x w=n matrix RAM. Circuit simulation was performerd, and 10 bits x :If words testable RAM was designed.

  • PDF

Software Security Testing using Block-based File Fault Injection (블록 기반 파일 결함 주입 기법을 이용한 소프트웨어 보안 테스팅)

  • Choi, Young-Han;Kim, Hyoung-Chun;Hong, Soon-Jwa
    • Journal of the Korea Institute of Information Security & Cryptology
    • /
    • v.17 no.4
    • /
    • pp.3-10
    • /
    • 2007
  • In this paper, we proposed the methodology for security testing using block-based file fault injection. When fault is inserted into software, we consider the format of file in order to efficiently reduce the error that is caused by mismatch of format of file. The Vulnerability the methodology focuses on is related to memory processing, such as buffer overflow, null pointer reference and so on. We implemented the automatic tool to apply the methodology to image file format and named the tool ImageDigger. We executed fault-injection focused on WMF and EMF file format using ImageDigger, and found 10 DOS(Denial of Service) in Windows Platform. This methodology can apply to block-based file format such as MS Office file.

Effects of ginseol k-g3, an Rg3-enriched fraction, on scopolamine-induced memory impairment and learning deficit in mice

  • Pena, Ike Dela;Yoon, Seo Young;Kim, Hee Jin;Park, Sejin;Hong, Eun Young;Ryu, Jong Hoon;Park, Il Ho;Cheong, Jae Hoon
    • Journal of Ginseng Research
    • /
    • v.38 no.1
    • /
    • pp.1-7
    • /
    • 2014
  • Background: Although ginsenosides such as Rg1, Rb1 and Rg3 have shown promise as potential nutraceuticals for cognitive impairment, their use has been limited due to high production cost and low potency. In particular, the process of extracting pure Rg3 from ginseng is laborious and expensive. Methods: We described the methods in preparing ginseol k-g3, an Rg3-enriched fraction, and evaluated its effects on scopolamine-induced memory impairment in mice. Results: Ginseol k-g3 (25-200 mg/kg) significantly reversed scopolamine-induced cognitive impairment in the passive avoidance, but not in Y-maze testing. Ginseol k-g3 (50 and 200 mg/kg) improved escape latency in training trials and increased swimming times within the target zone of the Morris water maze. The effect of ginseol k-g3 on the water maze task was more potent than that of Rg3 or Red ginseng. Acute or subchronic (6 d) treatment of ginseol k-g3 did not alter normal locomotor activity of mice in an open field. Ginseol k-g3 did not inhibit acetylcholinesterase activity, unlike donezepil, an acetylcholinesterase inhibitor. Rg3 enrichment through the ginseol k-g3 fraction enhanced the efficacy of Rg3 in scopolamine-induced memory impairment in mice as demonstrated in the Morris water maze task. Conclusion: The effects of ginseol k-g3 in ameliorating scopolamine-induced memory impairment in the passive avoidance and Morris water maze tests indicate its specific influence on reference or long-term memory. The mechanism underlying the reversal of scopolamine-induced amnesia by ginseol k-g3 is not yet known, but is not related to anticholinesterase-like activity.

A Study on the Rail Vehicle Applications and Increase the Capacity of Lithium Polymer Batteries (리튬폴리머 축전지의 철도차량 적용 및 용량증대에 관한 연구)

  • Cho, Kyu-Hwa;Kang, Seung-Wook
    • The Transactions of the Korean Institute of Electrical Engineers P
    • /
    • v.65 no.4
    • /
    • pp.340-345
    • /
    • 2016
  • Railway vehicle battery is supplying the power required for the initial start-up of the train, in the event of a fault in the vehicle, or catenary for supplying emergency power is one of the components are very important. Currently, the railway vehicles such as nickel-cadmium batteries are being used [1,2]. Ni-Cd batteries as a battery installed in the railway vehicles have a strong corrosion resistance is included, The charge-discharge performance is significantly degraded in cold weather, there is a danger of deterioration or explosion. Train accidents have been caused a lot of damage due to rapid deterioration and cracking of the battery and memory due to the effect of Ni-Cd batteries. In order to solve the problems, There is no risk of degradation, deterioration and leakage, cracking and exploding. maintenance is simple and applied measures proposed to apply Lithium Polymer battery of high performance. In addition, the lack of capacity problems identified by testing the different special systems is replaced by a 70Ah lithium-polymer battery is possible without changing the batteries of 50Ah caused by installing additional equipment in existing older trains were applied to the vehicle.

A Study on the Design of Testable CAM using MTA Code (MTA 코드를 적용한 Testable CAM 설계에 관한 연구)

  • 정장원;박노경;문대철
    • Journal of the Korean Institute of Telematics and Electronics C
    • /
    • v.35C no.6
    • /
    • pp.48-55
    • /
    • 1998
  • In this work, the testable CAM(Content Addressable Memory) is designed to perform the test effectively by inserting the ECC(Error Checking Circuit) inside the CAM. The designed CAM has the circuit which is capable of testing the functional faults in read, write, and match operations. In general the test circuit inserted causes the increase of total circuit area, Thus this work, utilizes the new MTA code to reduce the overhead of an area of the built-in test circuit which has a conventional parallel comparator. The designed circuit was verified using the VHDL simulator and the layout was performed using the 0.8${\mu}{\textrm}{m}$ double metal CMOS process. About 30% reduction of a circuit area wad achieved in the proposed CAM using the XOR circuit

  • PDF

Unique local deformations of the superelastic SMA rods during stress-relaxation tests

  • Ashiqur Rahman, Muhammad;Rahman Khan, Mujibur
    • Structural Engineering and Mechanics
    • /
    • v.22 no.5
    • /
    • pp.563-574
    • /
    • 2006
  • This paper studies mechanical behavior of the superelastic shape memory alloy (SMA) rods in terms of local deformations and time via tensile loading-unloading cycles for both ends fixed end constraints. Besides the unique stress induced martensitic transformation (SIMT), SMA's time dependent behavior when it is in mixed-phase condition upon loading and unloading, also need careful attention with a view of investigating the local deformation of the structural elements made of the same material. With this perspective, the so-called stress-relaxation tests have been performed to demonstrate and investigate the local strains-total strains relationships with time, particularly, during the forward SIMT. Some remarkable phenomena have been observed pertaining to SIMT, which are absent in traditional materials and those unique phenomena have been explained qualitatively. For example, at the stopped loading conditions the two ends (fixed end and moving end of the tensile testing machine) were in fixed positions. So that there was no axial overall deformation of the specimen but some notable increase in the axial local deformation was shown by the extensometer placed at the middle of the SMA specimen. It should be noted that this peculiar behavior termed as 'inertia driven SIMT' occurs only when the loading was stopped at mixed phase condition. Besides this relaxation test for the SMA specimens, the same is performed for the mild steel (MS) specimens under similar test conditions. The MS specimens, however, show no unusual increase of local strains during the stress relaxation tests.

Investigating the fatigue failure characteristics of A283 Grade C steel using magnetic flux detection

  • Arifin, A.;Jusoh, W.Z.W.;Abdullah, S.;Jamaluddin, N.;Ariffin, A.K.
    • Steel and Composite Structures
    • /
    • v.19 no.3
    • /
    • pp.601-614
    • /
    • 2015
  • The Metal Magnetic Memory (MMM) method is a non-destructive testing method based on an analysis of the self-magnetic leakage field distribution on the surface of a component. It is used for determining the stress concentration zones or any irregularities on the surface or inside the components fabricated from ferrous-based materials. Thus, this paper presents the MMM signal behaviour due to the application of fatigue loading. A series of MMM data measurements were performed to obtain the magnetic leakage signal characteristics at the elastic, pre-crack and crack propagation regions that might be caused by residual stresses when cyclic loadings were applied onto the A283 Grade C steel specimens. It was found that the MMM method was able to detect the defects that occurred in the specimens. In addition, a justification of the Self Magnetic Flux Leakage patterns is discussed for demonstrating the effectiveness of this method in assessing the A283 Grade C steel under cyclic loadings.

The Implementation of the Built-In Self-Test for AC Parameter Testing of SDRAM (SDRAM 의 AC 변수 테스트를 위한 BIST구현)

  • Sang-Bong Park
    • The Journal of Information Technology
    • /
    • v.3 no.3
    • /
    • pp.57-65
    • /
    • 2000
  • We have proposed BIST method and circuit for embedded 16M SDRAM with logic. It can test the AC parameter of embedded 16M SDRAM using the BIST circuit capable of detecting the address of a fail cell of a 16M SDRAM installed in an Merged Memory with Logic(MML) generating the information of repair for redundancy circuit. The function and AC parameter of the embedded memory can also be tested using the proposed BIST method. The total gate of the BIST circuit is approximately 4,500 in the case of synthesizing by $0.25\mu\textrm{m}$ cell library. and verify the result of Verilog simulation. The test time of each one AC parameter is about 200ms using 2Y-March 14N algorithm.

  • PDF

Building a Dynamic Analyzer for CUDA based System.

  • SALAH T. ALSHAMMARI
    • International Journal of Computer Science & Network Security
    • /
    • v.23 no.8
    • /
    • pp.77-84
    • /
    • 2023
  • The utilization of GPUs on general-purpose computers is currently on the rise due to the increase in its programmability and performance requirements. The utility of tools like NVIDIA's CUDA have been designed to allow programmers to code algorithms by using C-like language for the execution process on the graphics processing units GPU. Unfortunately, many of the performance and correctness bugs will happen on parallel programs. The CUDA tool support for the parallel programs has not yet been actualized. The use of a dynamic analyzer to find performance and correctness bugs in CUDA programs facilitates the execution of sophisticated processes, especially in modern computing requirements. Any race conditions bug it will impact of program correctness and the share memory bank conflicts to improve the overall performance. The technique instruments the programs in a way that promotes accessibility of the memory locations accessed by different threads well as to check for any bugs in the code of a program. The instrumented source code will be used initiated directly in the device emulation code of CUDA to send report for the user about all errors. The current degree of automation helps programmers solve subtle bugs in highly complex programs or programs that cannot be analyzed manually.

LSTM algorithm to determine the state of minimum horizontal stress during well logging operation

  • Arsalan Mahmoodzadeh;Seyed Mehdi Seyed Alizadeh;Adil Hussein Mohammed;Ahmed Babeker Elhag;Hawkar Hashim Ibrahim;Shima Rashidi
    • Geomechanics and Engineering
    • /
    • v.34 no.1
    • /
    • pp.43-49
    • /
    • 2023
  • Knowledge of minimum horizontal stress (Shmin) is a significant step in determining full stress tensor. It provides crucial information for the production of sand, hydraulic fracturing, determination of safe mud weight window, reservoir production behavior, and wellbore stability. Calculating the Shmin using indirect methods has been proved to be awkward because a lot of data are required in all of these models. Also, direct techniques such as hydraulic fracturing are costly and time-consuming. To figure these problems out, this work aims to apply the long-short-term memory (LSTM) algorithm to Shmin time-series prediction. 13956 datasets obtained from an oil well logging operation were applied in the models. 80% of the data were used for training, and 20% of the data were used for testing. In order to achieve the maximum accuracy of the LSTM model, its hyper-parameters were optimized significantly. Through different statistical indices, the LSTM model's performance was compared with with other machine learning methods. Finally, the optimized LSTM model was recommended for Shmin prediction in the well logging operation.