• IEMEK Journal of Embedded Systems and Applications
• /
• v.12 no.3
• /
• pp.131-138
• /
• 2017

QR/NFC tags have been utilized in various fields like exhibition, museum, and so on, but they have a drawback that they are read-only fundamentally. We devise a novel device called a smart memory tag (below mem-tag) which is supplemented with the write function through combining a flash memory into a NFC tag. A mem-tag is composed of an NFC tag, an MCU, a flash memory, a bluetooth module, and a battery, and is inter-operating with smartphones via bluetooth communication. It can be used in a bulletin board to support writing replies and in a check-in service to verify the presence of the site. What matters is that users' inter-operations are borne to be asynchronous, which leads to the energy consumption to wait for users' actions. Sleep mechanisms and asynchronous MAC protocols used in ubiquotous sensor networks cannot avoid the consumption of battery. In this paper, we propose a touch and play scheme for minimizing the consumption of battery that the MCU wakes up and PLAY when a user TOUCH the mem-tag. We implemented the system to show that our scheme lets the mem-tag work 50 times longer than the sleep and wake-up scheme.

• Journal of KIISE:Databases
• /
• v.37 no.3
• /
• pp.171-175
• /
• 2010

This paper analyzes the tag data inconsistency problem caused by incomplete execution of the tag access operation to the RFID tag's memory and proposes a protocol to control consistent tag data accesses with finalizing the incomplete operation. Passive RFID tag cannot guarantee complete execution of the tag access operations because of uncertainty and unexpected disconnection of RF communications. This leads to the tag data inconsistency problem. To handle this, we propose a concurrency control protocol which defines incomplete tag operations as continuous queries and monitors the tags're-observation continuously. The protocol finalizes the incomplete operation when the tag is re-observed while it blocks inconsistent data accesses from other operations. We justify the proposed protocol by analyzing the completeness and consistency. The experiments show that the protocol shows better performance than the traditional lock-based concurrency control protocol.

• Proceedings of the Korean Institute of Information and Commucation Sciences Conference
• /
• v.9 no.2
• /
• pp.899-902
• /
• 2005

Pipeline hazard due to branch instructions is the major factor of the degradation on the performance of microprocessors. Branch target buffer predicts whether a branch will be taken or not and supplies the address of the next instruction on the basis of that prediction. If the branch target buffer predicts correctly, the instruction flow will not be stalled. This leads to the better performance of microprocessor. In this paper, the architecture of a tag memory that branch target buffer and TLB can share is presented. Because the two tag memories used for branch target buffer and TLB each is replaced by single shared tag memory, we can expect the smaller ship size and the faster prediction. This hared tag architecture is more advantageous for the microprocessors that uses more bits of address and exploits much more instruction level parallelism.

• The Journal of the Korea Contents Association
• /
• v.9 no.11
• /
• pp.90-99
• /
• 2009

This paper presents the implementation of RFID EPC global network educational system based on using 900MHz air interface between the reader and the active tag. The software of reader and the active tag is developed on embedded environment, and the software of PC controlling the reader is based on window OS operated as the server. The ATmega128 VLSI chip is used for the processor of the reader and the active tag. As the development environment, AVR compiler is used for the reader and the active tag of which the programming language is C. The visual C++language of the visual studio on the PC activated as the server is used for development language. Main functions of this system are to control tag containing EPC global Data by PC through the reader, to obtain information of tag through the internet and to read/write data on tag memory. Finally the data written from the active tag's memory is sent to the PC via the reader as "read" operation and compare the received data with one already sent to the tag. Software implementation of 900MHz EPC global RFID educational system is done on the basis of these functions.

• Journal of Internet Computing and Services
• /
• v.8 no.4
• /
• pp.51-59
• /
• 2007

This paper presents the development of RFID educational system based on using 900MHz air interface between the reader and the active tag. The software of reader and the active tag is developed on embedded environment, and the software of PC controlling the reader is based on window OS operated as the server. The AT89C51ED2 VLSI chip is used for the processor of the reader and the active tag. As the development environment, Keil compiler is used for the reader and the active tag of which the programing language is C. The visual C language of the visual studio on the PC activated as the server is used for development language. To verify the function of the system, PC gets the tag's identification number through the reader and send the data to with the active tag memory a certain contents as "wite" operation. Finally the data written from the active tag's memory is sent to the PC via the reader as "read" operation and compare the received data with one already sent to the tag.

• Journal of Korea Multimedia Society
• /
• v.23 no.2
• /
• pp.293-300
• /
• 2020

Since the communication networks like the Internet collapses at disaster and calamity sites, a maintenance system that can be operated offline is required for the maintenance of various facilities. In this paper, we propose a system that memory tags attached on the facilities may transmit the emergency manual to a smart-phone, and the smart phone displays it off-line. The main issue is to design low energy mode memory tags. This study presents two kinds of methods and analyzes each's energy consumption mode. The first one is to develop memory tags by using one chip, and the next one is to design memory tags by forming multi-modules. Both ways show proper application fields under the low energy mode. This research selects the off-line maintenance system by using one chip design, and proposes the direction of contents for enhancing the effectiveness of the system. And we expect that this memory tags will be valuable for disaster scenes as well as battle fields.

• Proceedings of the IEEK Conference
• /
• 2007.07a
• /
• pp.29-30
• /
• 2007

In this paper, we propose Group Separation(GS) algorithm for RFID tag recognition. In GS algorithm, reader calculates tag ID by collision point, stores memory with the collision table. And reader classifies according to total number of tag ID's 1, requests each group. If tag comes into collision with the other tag, reader searches tag ID in collision table. As a result, we observes that transmitted data rate, the recognition time is decreased.

• Journal of Information Processing Systems
• /
• v.11 no.1
• /
• pp.95-103
• /
• 2015

This paper presents a memory efficient tree based anti-collision protocol to identify memoryless RFID (Radio Frequency Identification) tags that may be attached to products. The proposed deterministic scheme utilizes two bit arrays instead of stack or queue and requires only ${\Theta}(n)$ space, which is better than the earlier schemes that use at least $O(n^2)$ space, where n is the length of a tag ID in a bit. Also, the size n of each bit array is independent of the number of tags to identify. Our simulation results show that our bit array scheme consumes much less memory space than the earlier schemes utilizing queue or stack.

• The Journal of the Institute of Internet, Broadcasting and Communication
• /
• v.14 no.1
• /
• pp.15-21
• /
• 2014

Due to the development of manufacturing technology scaling, more transistors can be placed on a cache memories of a processor. However, processors become more vulnerable to the soft errors because of highly integrated transistors, the reliability of cache memory must consider seriously at the design level. Various researches are proposed to overcome the vulnerability of soft error, but researches of tag bit are proposed very rarely. In this paper, we revaluate the reliability improvement technique for tag bit, and analyse the protection rate of write-back operation, which is a typical case of not satisfying temporal locality. We also propose the methodology to improve the protection rate of write-back operation. The experiments of the proposed scheme shows up to 76.8% protection rate without performance degradations.

• IEMEK Journal of Embedded Systems and Applications
• /
• v.7 no.1
• /
• pp.1-7
• /
• 2012

A Smartphone has an ability accessing Internet by URL stored in NFC(Near Field Communication) Tag for storing the information of items, blogs and web pages. Because the system works through the Internet with URL, however, it needs to pay some costs like communication fee and time. If we can store the web page on the tags, we can save the communication overhead. But they have too small memory to store it. In this paper, we introduce the Micro-Webpage technology which can be stored in NFC tag or QR(Quick Response) code. To make a Micro-Webpage, we remove control tags from the web page to leave a user original content. The removed control tags are stored in our smartphone application as a template. The user content is also compressed to a smaller one by an lossless compression algorithm. When a tag is read, the stored content is decompressed and, it is combined with the template to make the original web page. We have implemented a prototype of Micro-Webpage system on Android platform and confirmed that the prototype has reasonable performance improvements in saving memory and loading web page time.