• 대한전자공학회논문지SD
• /
• 제46권8호
• /
• pp.41-52
• /
• 2009

Motion JPEG2000과 같은 동영상 압축 시스템에서는 데이터 메모리에 대한 빈번한 접근이 전체 시스템에 큰 병목 현상이 된다. 이처럼 시스템에서 요구하는 메모리의 대역폭을 감소시키기 위해서, 본 논문은 약간의 화질 손실이 있는 새로운 embedded compression(EC) 알고리즘과 구조를 고안하였다. 또한, 메모리 내의 압축된 데이터에 임의 접근성(Random Accessibility)과 짧은 지연 시간(Latency)을 보장하기 위해서 매우 단순하면서도 효율적인 entropy 부호화 방법을 제안하였다. 본 논문에서는 JPEG2000 표준안 알고리즘에는 어떠한 변경도 하지 않으면서, 제안한 multi-mode 알고리즘을 통해 JPEG2000 시스템에서 요구하는 메모리의 대역폭의 감소(약 52${\sim}$81%) 와 코드블록 메모리의 크기를 약 2 배 이상 감소시킬 수 있었다.

• 정보처리학회논문지A
• /
• 제14A권4호
• /
• pp.215-226
• /
• 2007

지난 수년간 저가의 공유메모리(Shared Memory) 시스템을 개발하기 위한 방법으로 빠른 상호 연결 네트워크를 이용한 DVSM(Distributed Virtual Shared Memory) 시스템의 구조에 관한 연구가 활발하게 진행되어 왔다. 그러나 DVSM은 소프트웨어 적으로 메모리 일관성을 유지하기 때문에 분산 처리 노드간의 많은 데이터 및 제어 신호 통신이 요구되며 이러한 통신 과부하(overhead)가 전체 성능 향상을 결정짓는 요인으로 작용한다. 일반적으로 프로세싱 노드의 수가 증가하면 통신 과부하도 따라서 증가하기 때문에 통신 과부하는 대용량(large-scale)의 DVSM을 구현하는데 매우 중요한 성능 요인이다. 이 논문에서는 차세대 상호 연결 기술 중 하나인 InfiniBand를 기반으로 대용량 DVSM 시스템을 구현하기 위한 성능 확장성을 정량적 및 정성적으로 연구하였다. 또한 이 연구를 바탕으로 성능 확장성이 뛰어난 DVSM 시스템을 개발하기 위한 차세대 상호 연결 네트워크의 요구 성능을 분석하였다.

• 인터넷정보학회논문지
• /
• 제6권4호
• /
• pp.47-58
• /
• 2005

플래시 메모리는 NOR 형과 NAND 형의 플래시 메모리 형태로 구분 할 수 있다. NOR 형태의 플래시 메모리는 빠른 읽기 속도와 Byte I/O 형태를 지원하기 때문에 ROM BIOS 와 같은 코드저장용으로 개발되어 진다. NAND 형태의 플래시 메모리는 NOR 형태의 플래시 메모리 보다 값이 싸고 임베디드 리눅스 시스템의 대용량 처리 장치 등에서와 같이 폭 넓게 사용되고 있다. 본 논문에서는 NAND 형태의 플래시 메모리를 이용하여 시스템의 성능을 저하 시키는 Swapping을 감소시키고, 수행시간을 보장할 수 있는 플래시 메모리 Swapping 알고리즘을 제안하여, 임베디드 시스템을 기반으로 하는 파일시스템을 설계한다. 실험과 플래시 파일 시스템 구현을 통하여 임베디드 시스템에서 요구하는 NAND 형 플래시 파일 시스템의 성능을 개선한다.

• KSII Transactions on Internet and Information Systems (TIIS)
• /
• 제12권11호
• /
• pp.5234-5251
• /
• 2018

It is well-known that virtualization technology can bring many benefits not only to users but also to service providers. From the view of system security and resource utility, higher resource sharing degree and higher system reliability can be obtained by the introduction of virtualization technology in distributed cloud. The small size time-sharing multiplexing technology which is based on virtual machine in distributed cloud platform can enhance the resource utilization effectively by server consolidation. In this paper, the concept of memory block and user satisfaction is redefined combined with user requirements. According to the unbalanced memory resource states and user preference requirements in multi-virtual machine environments, a model of proper memory resource allocation is proposed combined with memory block and user satisfaction, and at the same time a memory optimization allocation algorithm is proposed which is based on virtual memory block, makespan and user satisfaction under the premise of an orderly physical nodes states also. In the algorithm, a memory optimal problem can be transformed into a resource workload balance problem. All the virtual machine tasks are simulated in Cloudsim platform. And the experimental results show that the problem of virtual machine memory resource allocation can be solved flexibly and efficiently.

• 한국CDE학회논문집
• /
• 제9권4호
• /
• pp.294-305
• /
• 2004

Highly detailed geometric models are rapidly becoming commonplace in computer graphics and other applications. These complex models, which is often represented as complex1 triangle meshes, mainly suffer from the vast memory requirement for real-time manipulation of arbitrary geometric shapes without loss of data. Various techniques have been devised to challenge these problems in views of geometric processing, not a representation scheme. This paper proposes the new mesh structure for the compact representation and the efficient handling of the highly complex models. To verify the compactness and the efficiency, the memory requirement of our representation is first investigated and compared with other existing representations. And then we analyze the time complexity of our data structure by the most critical operation, that is, the enumeration of the so-called one-ring neighborhood of a vertex. Finally, we evaluate some elementary modeling functions such as mesh smoothing, simplification, and subdivision, which is to demonstrate the effectiveness and robustness of our mesh structure in the context of the geometric modeling and processing.

• 한국전산유체공학회:학술대회논문집
• /
• 한국전산유체공학회 2001년도 춘계 학술대회논문집
• /
• pp.38-44
• /
• 2001

An efficient Gauss-Seidel time integration scheme is developed for solving the Euler and Navier-Stokes equations on unstructured meshes. Roe's FDS is used for the explicit residual computations and van Leer's FVS for evaluating implicit flux Jacobian. To reduce the memory requirement to a minimum level, off-diagonal flux Jacobian contributions are repeatedly calculated during the Gauss-Seidel sub-iteration process. Computational results based on the present scheme show that approximately $15\%$ of CPU time reduction is achieved while maintaining the memory requirement level to $50-60\%$ of the original Gauss-Seidel scheme.

• 한국경영과학회지
• /
• 제12권2호
• /
• pp.42-50
• /
• 1987

This objective of this paper is to develop an efficient method with small memory requirement for a feed-mixing problem on a micro computer. First this method uses the decomposition principle to reduce the memory requirement. Next, the decomposition principle is modified to fit the problem. Further four different variations in solving subproblems are designed in order to improve efficiency of the principle. According to the test with respect to the processing time, the best variation is such that the dual simplex method is used, and the optimal basis of a previous subproblem is used as an initial basis, and the master problem is (M +1) dimensional. In general, the convergence of solution becomes slower near the optimal value. This paper introduces a termination criterion for a sufficiently good solution. According to the test, 5%-tolerence is acceptable with respect to the relation between the processing time and optimal value.

• JSTS:Journal of Semiconductor Technology and Science
• /
• 제9권4호
• /
• pp.216-224
• /
• 2009

The endless scaling down of the semiconductor process made the impact of the power network noise on the performance of the state-of-the-art chip a serious design problem. This paper compares the performances of two popular circuit reduction approaches used to improve the efficiency of power network noise analysis: moment matching-based model order reduction (MOR) and node elimination-based MOR. As the benchmarks, we chose PRIMA and R2Power as the matching-based MOR and the node elimination-based MOR. Experimental results indicate that the accuracy, efficiency, and memory requirement of both methods very strongly depend on the structure of the given circuit, i.e., numbers of the nodes and sources, and the number of moments to preserve for PRIMA. PRIMA has higher accuracy in general, while the error of R2Power is also in the acceptable range. On the other hand, PRIMA has the higher efficiency than R2Power, only when the numbers of nodes and sources are small enough. Otherwise, R2Power clearly outperforms PRIMA in efficiency. In the memory requirement, the memory size of PRIMA increases very quickly as the numbers of nodes, sources, and preserved moments increase.

• 제어로봇시스템학회:학술대회논문집
• /
• 제어로봇시스템학회 1993년도 한국자동제어학술회의논문집(국내학술편); Seoul National University, Seoul; 20-22 Oct. 1993
• /
• pp.342-347
• /
• 1993

For a fast evolution, a memory-based implementation of a petri net is discussed. A sub-class petri net model called B-petri net is suggested to make a memory-based implementation feasible in a large size application. The suggested B-petri net is a binary-petri net since only a binary-typed decision, fork and join are allowed. The application of a B-petri nt is focused to a SFC(sequential function chart) program. The memory requirement, speed and computational load are compared with a petri net when they are implementated by a memory-based method.

• 한국컴퓨터정보학회논문지
• /
• 제21권4호
• /
• pp.1-8
• /
• 2016

In small embedded systems including IoT devices, memory size is very small and it is important to reduce memory amount for execution of application programs. For multi-threaded applications, stack may consume a large amount of memory because each thread has its own stack of sufficiently large size for worst case. This paper presents an implementation of single stack multi-threading, called SSThread (Single Stack Thread), by sharing a stack for all threads to reduce stack memory size. By using SSThread, multi-threaded applications can be programmed based on normal C language environment and there is no requirement of transporting multi-threading operating systems. It consists of several library functions and various C macro definitions. Even though some functional restrictions in comparison to operating systems supporting complete multi-thread functionalities, it is very useful for small embedded systems with tiny memory size and it is simple to setup programming environment for multi-thread applications.