• 제목/요약/키워드: memory efficiency

검색결과 709건 처리시간 0.027초

A Low-Power LSI Design of Japanese Word Recognition System

  • Yoshizawa, Shingo;Miyanaga, Yoshikazu;Wada, Naoya;Yoshida, Norinobu
    • 대한전자공학회:학술대회논문집
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    • 대한전자공학회 2002년도 ITC-CSCC -1
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    • pp.98-101
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    • 2002
  • This paper reports a parallel architecture in a HMM based speech recognition system for a low-power LSI design. The proposed architecture calculates output probability of continuous HMM (CHMM) by using concurrent and pipeline processing. They enable to reduce memory access and have high computing efficiency. The novel point is the efficient use of register arrays that reduce memory access considerably compared with any conventional method. The implemented system can achieve a real time response with lower clock in a middle size vocabulary recognition task (100-1000 words) by using this technique.

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TMS320C80시스템에서 Radon 변환의 병렬 구현 (Parallel Implementation of Radon Transform on TMS320C80-based System)

  • 송정호;성효경최흥문
    • 대한전자공학회:학술대회논문집
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    • 대한전자공학회 1998년도 추계종합학술대회 논문집
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    • pp.727-730
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    • 1998
  • In this paper, we propose an implementation of an efficient parallel Radon transform on TMS320C80-based system. For an N$\times$N SAR image, we can obtain O(NM/p) of the conventional parallel Radon transform, by representing the projection patterns in Radon space variables instead of the image space variables, and pipelining the algorithm, where p is the number of processors and M is the number of projection angles. Also, we can reduce the time for the dynamic load distribution among the nodes and the communication overheads of accessing the global memories, by pipelining the memory and processing operations by using tripple buffer structure. Experimental results show an efficient parallel Radon transform of speedup Sp=3.9 and efficiency E=97.5% for 256$\times$256 image, when implemented on TMS320C80 composed of four parallel slave processors with three memory blocks.

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간결하고 효율적인 폴리곤 메쉬의 표현 구조 (A Compact and Efficient Polygonal Mesh Representation)

  • 박상근;이상헌
    • 한국CDE학회논문집
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    • 제9권4호
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    • pp.294-305
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    • 2004
  • Highly detailed geometric models are rapidly becoming commonplace in computer graphics and other applications. These complex models, which is often represented as complex1 triangle meshes, mainly suffer from the vast memory requirement for real-time manipulation of arbitrary geometric shapes without loss of data. Various techniques have been devised to challenge these problems in views of geometric processing, not a representation scheme. This paper proposes the new mesh structure for the compact representation and the efficient handling of the highly complex models. To verify the compactness and the efficiency, the memory requirement of our representation is first investigated and compared with other existing representations. And then we analyze the time complexity of our data structure by the most critical operation, that is, the enumeration of the so-called one-ring neighborhood of a vertex. Finally, we evaluate some elementary modeling functions such as mesh smoothing, simplification, and subdivision, which is to demonstrate the effectiveness and robustness of our mesh structure in the context of the geometric modeling and processing.

열잡음 메모리 효과 제거기를 이용한 전력증폭기의 효율 개선 (The Design of Power Amplifier using Temperature Memory Effect Compensation)

  • 고영은;이지영
    • 정보학연구
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    • 제10권3호
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    • pp.47-58
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    • 2007
  • In this paper, we designed and manufactured the distortion-cancellation module which is able to compensate thermal-noise distortion by software. The distortion-cancellation algorithm not only bring forth system non-linear distortion by input level but also bring compensate component of distortion by thermal to get rid off distortion from now on. After TMS 320C6711 DSP to recognize our algorithm, we manufactured the module for every kinds of system. To evaluate efficiency of the distortion-cancellation module, we designed and manufactured communication system. By measured result, if system output power is -3dBm equally, 12dB of ACLR has improved in 1MHz away from a center frequency, and also gain has increased up to 0.5dB.

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JVT(Joint Video Team)압축/복원방식의 복잡도 분석

  • 이영렬
    • 방송과미디어
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    • 제7권3호
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    • pp.75-82
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    • 2002
  • 본 연구에서는 ITU-T와 MPEG에서 공동개발중인 JVT압축/복원방식에 대한 복잡도 분석이 수행된다. 압축률을 향상시키는 측면U떠 부호화 할 때 3가지의 configuration을 설정하여 각각의 configuration이 부호기와 복호기 구현시 필요한 메모리 및 계산시간에 대한 분석을 수행한다. 복잡도분석을 위하여 ATOMIUM 분석기를 이용한 메모리 대역폭 및 처리시간의 2가지 요인에 대한 결과를 소개한다. 또한 부호기 및 복호기의 각 비디오 툴들에 대한 상대적인 계산량을 정량적으로 도시한다.

부분문제가 같은 블록대각형 선형계획문제의 효율적인 방볍 (An Efficient Algorithm for a Block Angular Linear Program with the Same Blocks)

  • 양병학;박순달
    • 한국경영과학회지
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    • 제12권2호
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    • pp.42-50
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    • 1987
  • This objective of this paper is to develop an efficient method with small memory requirement for a feed-mixing problem on a micro computer. First this method uses the decomposition principle to reduce the memory requirement. Next, the decomposition principle is modified to fit the problem. Further four different variations in solving subproblems are designed in order to improve efficiency of the principle. According to the test with respect to the processing time, the best variation is such that the dual simplex method is used, and the optimal basis of a previous subproblem is used as an initial basis, and the master problem is (M +1) dimensional. In general, the convergence of solution becomes slower near the optimal value. This paper introduces a termination criterion for a sufficiently good solution. According to the test, 5%-tolerence is acceptable with respect to the relation between the processing time and optimal value.

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The Low-Area of New arc-tangent Look-up Table and A Low-Overhead for CATV Modem Systems

  • Ban, Young-Hoon;Park, Jong-Woo;Cho, Byung-Lok;Song, Jai-Chul
    • 대한전자공학회:학술대회논문집
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    • 대한전자공학회 1999년도 하계종합학술대회 논문집
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    • pp.857-860
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    • 1999
  • It is made possible a removal of the preamble for carrier recovery and symbol-timing recovery by storing a burst in memory with low overhead QPSK demodulation and this demodulation method also effects frame efficiency improved by processed synchronization performance. In this paper, we have proposed that new algorithm for arc-tangent look-up table which transform the input I, Q data by phase. This I, Q data plays an important role in demodulation and makes demodulator with low-overhead by storing a burst in memory. To evaluate proposed new algorithm and symbol-timing recovery method, function simulation and timing verification have been done by using synopsys VHDL tool.

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모바일 로봇의 네비게이션을 위한 빠른 경로 생성 알고리즘 (Fast Path Planning Algorithm for Mobile Robot Navigation)

  • 박정규;전흥석;노삼혁
    • 대한임베디드공학회논문지
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    • 제9권2호
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    • pp.101-107
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    • 2014
  • Mobile robots use an environment map of its workspace to complete the surveillance task. However grid-based maps that are commonly used map format for mobile robot navigation use a large size of memory for accurate representation of environment. In this reason, grid-based maps are not suitable for path planning of mobile robots using embedded board. In this paper, we present the path planning algorithm that produce a secure path rapidly. The proposed approach utilizes a hybrid map that uses less memory than grid map and has same efficiency of a topological map. Experimental results show that the fast path planning uses only 1.5% of the time that a grid map based path planning requires. And the results show a secure path for mobile robot.

멀티미디어 선반입에 적용 가능한 파일 액세스 패턴 기반의 선반입 시스템 (Prefetching System based on File Access Pattern Applicable to Multimedia Prefetching Scheme)

  • 황보준형;서대화
    • 한국멀티미디어학회논문지
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    • 제4권6호
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    • pp.489-499
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    • 2001
  • This paper presents the SIC(Size-Interval-Count) prefetching system that can record the file access patterns of applications within a relatively small space of memory based on the repetitiveness of the file access patterns. The SICPS(SIC Prefetching System) is based on knowledge-based prefetching methods which includes high correctness in predicting future accesses of applications. The proposed system then uses the recorded file access patterns, referred to as "SIC access pattern information", to correctly predict the future accesses of the applications. The proposed prefetching system improved the response time by about 40% compared to the general file system and showed remarkable memory efficiency compared to the previously knowledge-based prefetching methods.

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Real-time Object Recognition with Pose Initialization for Large-scale Standalone Mobile Augmented Reality

  • Lee, Suwon
    • KSII Transactions on Internet and Information Systems (TIIS)
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    • 제14권10호
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    • pp.4098-4116
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    • 2020
  • Mobile devices such as smartphones are very attractive targets for augmented reality (AR) services, but their limited resources make it difficult to increase the number of objects to be recognized. When the recognition process is scaled to a large number of objects, it typically requires significant computation time and memory. Therefore, most large-scale mobile AR systems rely on a server to outsource recognition process to a high-performance PC, but this limits the scenarios available in the AR services. As a part of realizing large-scale standalone mobile AR, this paper presents a solution to the problem of accuracy, memory, and speed for large-scale object recognition. To this end, we design our own basic feature and realize spatial locality, selective feature extraction, rough pose estimation, and selective feature matching. Experiments are performed to verify the appropriateness of the proposed method for realizing large-scale standalone mobile AR in terms of efficiency and accuracy.