• Speech Sciences
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• v.10 no.2
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• pp.35-43
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• 2003

General speaker verification systems improve their recognition performances by normalizing log likelihood ratio, using a speaker model and its background speaker model that are required to be verified. So these systems rely heavily on the availability of much speaker independent databases for background speaker model design. This constraint, however, may be a burden in practical and portable devices such as palm-top computers or wireless handsets which place a premium on computations and memory. In this paper, new approach for the GMM-based background model design used in portable speaker verification system is presented when the enrollment data is available. This approach is to modify three parameters of GMM speaker model such as mixture weights, means and covariances along with reduced mixture order. According to the experiment on a 20 speaker population from YOHO database, we found that this method had a promise of effective use in a portable speaker verification system.

• 제어로봇시스템학회:학술대회논문집
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• 2002.10a
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• pp.89.1-89
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• 2002

Conventional multilayer feedforward artificial neural networks are very effective in dealing with spatial problems. To deal with problems with time dependency, some kinds of memory have to be built in the processing algorithm. In this paper we show how the newly proposed Serial Input Neuron (SIN) convolutional decoders can be derived. As an example, we derive the SIN decoder for \ulcornerrate code with constraint length 3. The SIN is tested in Gaussian channel and the results are compared to the results of the optimal Viterbi decoder. A SIN approach to decode convolutional codes is presented. No supervision is required. The decoder lends itself to pleasing implementations in hardware and processing...

• Journal of the Korean Institute of Telematics and Electronics A
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• v.32A no.4
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• pp.24-31
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• 1995

In this paper, the dual-mode burst-error-correcting decoding algorithm is adapted to the multiple trellis-coded .pi./4 shift QPSK in order to achieve the improvement of bit error rate (BER) performance over fading channels. The dual-mode adaptive decoder which combines maximum likelihood decoding with a burst detection scheme usually operates as a Viterbi decoder and switches to time diversity error recovery whenever an uncorrectable error pattern is identified. Rayleigh fading channels and Rician fading channels having the Rician parameter K=5dB are used in computer simulation, and the simulation results are compared with those of interleaving techniques. It is shown that under the constraint of the fixed overall memory quantity, the dual-mode adaptive decoding scheme gains an advantage in the BER performance with respect to interleaving strategies.

• Proceedings of the KIEE Conference
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• 2008.07a
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• pp.1939-1940
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• 2008

1967년 Andrew J. Viterbi에 의해 처음 제안된 Viterbi 알고리즘은 길쌈부호(convolution code)의 대표적인 복호방법으로 현재 통신 기술 중에서 가장 많이 쓰이는 것 중에 하나이다. Viterbi decoder는 사용되는 시스템의 사양에 따라 에러 수정 능력이 다른데 통신 channel 상의 오류뿐만 아니라 Viterbi decoder내부에 있는 메모리에서 발생하는 오류도 Viterbi decoder의 에러 수정 능력에 영향을 준다. 본 논문에서는 일반적으로 많이 확인되었던 channel상의 오류와 함께 Viterbi decoder내부에 있는 메모리에서 오류가 발생했을 때 복.부호기의 사양에 따른 에러정정능력을 분석하였다.

• Proceedings of the KIEE Conference
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• 1988.07a
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• pp.587-590
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• 1988

In the case of VLSI computer system control unit design using PLA, optimal state code assignment algorithm to minimize the PLA area is proposed. An optimal state code assignment algorithm which considers output state and logic minimization simultaneously is proposed, and by means of this, algorithm product term is minimized. Also, by means of this algorithm running time and memory capacitance is decreased as against heuristic state code assignment algorithm which uses matrix calculation and considers the constraint relation only. This algorithm is implemented on VAX 11/750 (UNIX4.3BSD). Through the various test example applied proposed algorithm, the efficiency of this algorithm is shown.

• Journal of the Korea Institute of Military Science and Technology
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• v.3 no.2
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• pp.131-139
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• 2000

A design of CPS attitude determination system is described in this paper. The designed system is a low cost high precision 24 channel single frequency GPS(Global Positioning System) receiver which provides a precise absolute heading and pitch (or roll) as well as a position. It uses commercial chip-set and consists of two RF parts, two signal-tracking parts, a processor, memory parts and I/Os. In order to determine precise attitude, accurate carrier phase measurements and an efficient integer ambiguity resolution method are required. To meet these requirements, a PLL (Phase Locked Loops) is designed, and an algorithm called ARCE (Ambiguity Resolution with Constraint Equation) is adopted. The hardware and software structure of the system will be described, and the performance evaluated under various conditions will be presented. The test results will promise that more reliable navigation system be possible because the system provides all navigational information such as position, velocity, time and attitude.

• Proceedings of the KSR Conference
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• 2000.05a
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• pp.324-329
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• 2000

Object of a real-time system, that performs exact information based on the real-time constraint. is required for an improvement of high reliability. The fault-tolerant task scheduling strategy of multiprocessor as using a distributed memory based on a hardware redundancy can be improved into a high reliability of the real-time system. Therefore, this paper is shown to analyze the reliability of the system by using the transfer parameter and make the modeling in reference to a minimization of the fault-tolerant task scheduling strategy which uses a percentage of task missing and deadline parameter based on optimization task size.

• Proceedings of the Korean Institute of Information and Commucation Sciences Conference
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• 2016.10a
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• pp.762-764
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• 2016

The ECQV(Elliptic Curve Qu-Vanstone) is a implicit certificate scheme based on ECC(Elliptic Curve Cryptography). Implicit certificates are smaller and faster than a traditional explicit certificate. Therefore, it can be used in a memory or bandwidth constraint communication environments. Also, the butterfly key expansion algorithm is a method to issue many certificates by using only one public key. In this study, by applying the butterfly key expansion algorithm to ECQV, we suggest a new useful issuing certificate method that can be used in vehicular communication environments.

• Proceedings of the Korean Institute of Information and Commucation Sciences Conference
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• 2008.05a
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• pp.93-96
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• 2008

This paper describes an efficient design of a multi-standard Viterbi decoder that supports multiple constraint lengths and code rates. The Viterbi decode. is parameterized for the code rates 1/2, 1/3 and constraint lengths 7, 9, thus it has four operation modes. In order to achieve low hardware complexity and low power, an efficient architecture based on hardware sharing techniques is devised. Also, the optimization of ACCS (Accumulate-Subtract) circuit for the one-point trace-back algorithm reduces its area by about 35% compared to the full parallel ACCS circuit. The parameterized Viterbi decoder core has 79,818 gates and 25,600 bits memory, and the estimated throughput is about 105 Mbps at 70 MHz clock frequency.

• The Journal of Korean Institute of Communications and Information Sciences
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• v.36 no.10A
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• pp.823-829
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• 2011

Recently, wireless body area network (WBAN) has received much attention as an application for the ubiquitous healthcare system. In WBAN, each sensor nodes and a personal base station such as PDA have an energy constraint and computation overhead should be minimized due to node's limited computing power and memory constraint. The reliable data transmission also must be guaranteed because it handles vital signals. In this paper, we propose a systematic network coding scheme for WBAN to reduce the network coding overhead as well as total energy consumption for completion the transmission. We model the proposed scheme using Markov chain. To minimize the total energy consumption for completing the data transmission, we made the problem as a minimization problem and find an optimal solution. Our simulation result shows that large amount of energy reduction is achieved by proposed systematic network coding. Also, the proposed scheme reduces the computational overhead of network coding imposed on each node by simplify the decoding process.