• Title/Summary/Keyword: low-power system

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Design for Landfill Gas Application by Low Calorific Gas Turbine and Green House Optimization Technology (Low Calorific Gasturbine 매립지 적용 및 유리온실 운용기술 설계)

  • Hur, Kwang-Beom;Park, Jung-Keuk;Lee, Jung-Bin;Rhim, Sang-Gyu
    • 한국신재생에너지학회:학술대회논문집
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    • 2010.06a
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    • pp.244.1-244.1
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    • 2010
  • Bio energy development by using Low Calorific Gas Turbine(LCGT) has been developed for New & Renewable energy source for next generation power system, low fuel and operating cost method by using the renewable energy source in landfill gas (LFG), Food Waste, water waste and Livestock biogas. Low calorific fuel purification by pretreatment system and carbon dioxide fixation by green house system are very important design target for evaluate optimum applications for bio energy. Main problems and accidents of Low Calorific Gas Turbine system was derived from bio fuel condition such as hydro sulfide concentration, siloxane level, moisture concentration and so on. Even if the quality of the bio fuel is not better than natural gas, LCGT system has the various fuel range and environmental friendly power system. The mechanical characterisitics of LCGT system is a high total efficiency (>70%), wide range of output power (30kW - 30MW class) and very clean emmission from power system (low NOx). Also, we can use co-generation system. A green house designed for four different carbon dioxide concentration from ambient air to 2000 ppm by utilizing the exhaust gas and hot water from LCGT system. We look forward to contribute the policy for Renewable Portfolio Standards(RPS) by using LCGT power system.

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The Low Voltage Analog Multiplier Using The Bulk-driven MOSFET Techniques (Bulk-Driven 기법을 이용한 저전압 Analog Multiplier)

  • 문태환;권오준;곽계달
    • Proceedings of the IEEK Conference
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    • 2001.06b
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    • pp.301-304
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    • 2001
  • The analog multiplier is very useful building block in many circuits such as filter, frequency-shifter, and modulators. In recent year, The main design issue of circuit designer is low-voltage/low-power system design, because of all systems are recommended very integrated system and portable system In this paper, the proposed the four-quadrant analog multiplier is using the bulk-driven techniques. The bulk-driven technique is very useful technique in low-voltage system, compare with gate-driven technique. therefore the proposed analog multiplier is operated in 1V supply voltage. And the proposed analog multiplier is low power dissipation compare with the others. therefor the proposed analog multiplier is convenient in low-voltage/low-power in system.

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Parameter Selection Method for Power System Stabilizer of a Power Plant based on Hybrid System Modeling (하이브리드시스템 모델링 기반 발전기 전력시스템 안정화장치 정수선정 기법)

  • Baek, Seung-Mook
    • The Transactions of The Korean Institute of Electrical Engineers
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    • v.63 no.7
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    • pp.883-888
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    • 2014
  • The paper describes the parameter tuning of power system stabilizer (PSS) for a power plant based on hybrid system modeling. The existing tuning method based on bode plot and root locus is well applied to keep power system stable. However, due to linearization of power system and an assumption that the parameter ratio of the lead-lag compensator in PSS is fixed, the results cannot guarantee the optimal performances to damp out low-frequency oscillation. Therefore, in this paper, hybrid system modeling, which has a DAIS (differential-algebraic-impusive-switched) structure, is applied to conduct nonlinear modeling for power system and find optimal parameter set of the PSS. The performances of the proposed method are carried out by time domain simulation with a single machine connected to infinite bus (SMIB) system.

Quantitative Analysis of Power Consumption for Low Power Embedded System by Types of Memory in Program Execution (저전력 임베디드 시스템을 위한 프로그램이 수행되는 메모리에 따른 소비전력의 정략적인 분석)

  • Choi, Hayeon;Koo, Youngkyoung;Park, Sangsoo
    • Journal of Korea Multimedia Society
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    • v.19 no.7
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    • pp.1179-1187
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    • 2016
  • Through the rapid development of latest hardware technology, high performance as well as miniaturized size is the essentials of embedded system to meet various requirements from the society. It raises possibilities of genuine realization of IoT environment whose size and battery must be considered. However, the limitation of battery persistency and capacity restricts the long battery life time for guaranteeing real-time system. To maximize battery life time, low power technology which lowers the power consumption should be highly required. Previous researches mostly highlighted improving one single type of memory to increase ones efficiency. In this paper, reversely, considering multiple memories to optimize whole memory system is the following step for the efficient low power embedded system. Regarding to that fact, this paper suggests the study of volatile memory, whose capacity is relatively smaller but much low-powered, and non-volatile memory, which do not consume any standby power to keep data, to maximize the efficiency of the system. By executing function in specific memories, non-volatile and volatile memory, the quantitative analysis of power consumption is progressed. In spite of the opportunity cost of all of theses extra works to locate function in volatile memory, higher efficiencies of both power and energy are clearly identified compared to operating single non-volatile memory.

A Study on Low Area/Power Schemes of Noise Generation System (잡음 발생기의 저면적, 저전력 방안에 관한 연구)

  • 이창기
    • Journal of the Korea Computer Industry Society
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    • v.4 no.4
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    • pp.433-442
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    • 2003
  • The performance of communication systems should be tested against a set of requirements. To this end, noise generation systems are used to generate noise signals with specified characteristics. In recent study, noise generation system using DCT outperforms the conventional noise generation system when a noise model requires complicated PSD(Power Spectral Density) specifications. In this paper low area/power structures of non-DCT block in DCT-based noise generation system are proposed. Simulation results show that the low area structure results in area reduction by 61-64% and the low power structure achieves power reduction by 88-89% except DCT blocks.

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Analysis of the Factors Affecting Low-Frequency Oscillations in KEPCO Power System` With Pumped-Storage Plant (한전 전력계통의 저주파 진동현상 요인분석;양수발전기 기동시)

  • Kil Yeong Song;Sae Hyuk Kwon;Kyu Min Ro;Seok Ha Song
    • The Transactions of the Korean Institute of Electrical Engineers
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    • v.41 no.8
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    • pp.841-849
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    • 1992
  • In power system operation, the stability of synchronous machine has been recognized one of the most important things. AESOPS program developed by EPRI in U.S.A. is a frequency domain analysis program in power system stability and it computes the electro-mechanical oscillation mode. This paper presents how to analyze the power system small signal stability problem efficiently by uusing the AESOPS program and analyze the various factors affecting the damping characteristics of these oscillations in KEPCO power system of 1986 with pumped-storage plant. To reduce the computing time and efforts, selecting the poorly-damped oscillation mode and clustering technique have been used. The characteristics of load, the amount of power flow on the transmission line and the gain of exciter have a significant effects on the damping of the system while the governing system has only a minor one. With the Power System Stabilizers, the stability of the power system has been improved.

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Repetitive Controller for High Power UPS System with Low Switching Frequency (낮은 스위칭 주파수를 갖는 대용량 무정전 전원장치를 위한 반복제어기)

  • Lee, Taeyeong;Cho, Younghoon;KIM, JISU;BYEON, YONGSEOP
    • Proceedings of the KIPE Conference
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    • 2016.07a
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    • pp.477-478
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    • 2016
  • This paper introduces a repetitive controller in low switching frequency applications. Generally, A high power UPS system has a high rated current. And the system usually consist of high power IGBT has a tail current. So the high power UPS system operates in low switching frequency because of this tail current. The repetitive controller improve THD of output voltage or current by reducing the steady state error. The effect of the repetitive controller is proved by simulations.

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Low Power Test for SoC(System-On-Chip)

  • Jung, Jun-Mo
    • Proceedings of the Korean Institute of Information and Commucation Sciences Conference
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    • 2011.10a
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    • pp.892-895
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    • 2011
  • Power consumption during testing System-On-Chip (SOC) are becoming increasingly important as the IP core increases in SOC. We present a new algorithm to reduce the scan-in power using the modified scan latch reordering and clock gating. We apply scan latch reordering technique for minimizing the hamming distance in scan vectors. Also, during scan latch reordering, the don't care inputs in scan vectors are assigned for low power. Also, we apply the clock gated scan cells. Experimental results for ISCAS 89 benchmark circuits show that reduced low power scan testing can be achieved in all cases.

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A Study on the Signal Anti-reduction Equipment in Power Line Communication (전력선 통신 시스템을 위한 신호 감쇠 저하 장치 연구)

  • 김주환
    • Proceedings of the KIPE Conference
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    • 2000.07a
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    • pp.103-106
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    • 2000
  • In this paper a communication system that is not using the communication line but power line is presented. It will be very useful for an information-oriented society with tele-metering and home automation. Conventional system has a difficulty in transmitting information due to decreasing communication voltage and increasing carrier, current. Proposed idea is a special type switching amplifier system which has a low inner resistance. It can provide reactive power and dose not have low impedance between the transceivers. This new system is proposed to overcome the loss of conductor load in a PLC system.

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Enhancement of Power System Dynamic Stability by Designing a New Model of the Power System

  • Fereidouni, Alireza;Vahidi, Behrooz
    • Journal of Electrical Engineering and Technology
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    • v.9 no.2
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    • pp.379-389
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    • 2014
  • Low frequency oscillations (LFOs) are load angle oscillations that have a frequency between 0.1-2.0 Hz. Power system stabilizers (PSSs) are very effective controllers in improvement of the damping of LFOs. PSSs are designed by linearized models of the power system. This paper presents a new model of the power system that has the advantages of the Single Machine Infinite Bus (SMIB) system and the multi machine power system. This model is named a single machine normal-bus (SMNB). The equations that describe the proposed model have been linearized and a lead PSS has been designed. Then, particle swarm optimization technique (PSO) is employed to search for optimum PSS parameters. To analysis performance of PSS that has been designed based on the proposed model, a few tests have been implemented. The results show that designed PSS has an excellent capability in enhancing extremely the dynamic stability of power systems and also maintain coordination between PSSs.