• KIEE International Transactions on Electrophysics and Applications
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• v.5C no.6
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• pp.270-275
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• 2005

In order for the application of the in-vivo endoscopic biopsy, a micromirror which can be driven at a low voltage is required. In this paper, a two-step micromirror composed of bottom electrodes, moving plate and top mirror plate is proposed. Because an electrical wiring of two plates are separated, they can be actuated separately. Therefore, an intermediate moving plate plays an important role in reducing the driving voltage in half. The designed device was fabricated by the surface micromachining. Maximum rotation angle of $6.3^{\circ}$ was obtained by applying DC 48V, while a conventional one-step mirror pulled down at DC 120V. The designed structure can be used in microphotonic applications requiring low driving voltage.

• Journal of the Korean Institute of Illuminating and Electrical Installation Engineers
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• v.29 no.2
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• pp.91-96
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• 2015

There are provision for risk analysis in IEC standards. It is to determine the need for installation of a surge protection device (SPD) in order to protect the low-voltage electrical installations from overvoltages caused by atmospheric phenomena and the like. However, scattered many related standards, the lack of details are not easy to apply it in the field. We investigated the relevant domestic and international standards for applies to the international standards in domestic. And we proposed the flow chart for determining the need for protection of the low-voltage electrical installations from overvoltage due to atmospheric phenomena and it set the appling target facility.

• Proceedings of the KIEE Conference
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• 2005.07b
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• pp.1416-1418
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• 2005

This paper presents a new hybrid control method of asymmetrical half-bridge converter(AHBC) with low voltage stresses of the diodes and interleaved PFC(power factor correction). The proposed new control scheme can observe variation of secondary diodes voltage stresses by variation of duty ratio and then decide the control portions which are asymmetrical control and PFM(Pulse Frequency Modulation). Therefore, the proposed control scheme has many advantages such as a low rated voltage of the secondary diodes, low conduction loss according to the low voltage drop and wide zvs range by load variation. Through simulation results, the validity of the proposed control scheme is demonstrated.

• Journal of Power Electronics
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• v.13 no.2
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• pp.186-196
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• 2013

This paper presents a low voltage-stress AC-linked charge equalizing system for balancing the energy in a serially connected, valve-regulated lead acid battery string using a modular converter that consists of multiple transformers coupled together. Each converter was coupled through an AC-linked bus to increase the overall energy transfer efficiency of the system and to eliminate the problem of the unbalanced charging of batteries. Previous solutions are based on centralized and modularized topologies. A centralized topology requires a redesign of the hardware and related components. It also faces a high voltage stress when the number of batteries is expanded. Modularized solutions use low-voltage-stress, double-stage, DC-linked topologies which leads to poor energy transfer efficiency. The proposed solution uses a low-voltage stress, AC-linked, modularized topology that makes adding more batteries easier. It also has a better energy transfer efficiency. To ensure that the charge equalization system operates smoothly and safely charges batteries, a small intelligent microcontroller was used in the control section. The efficiency of this charge equalization system is 85%, which is 21% better than other low-voltage-stress DC-linked charging techniques. The validity of this approach was confirmed by experimental results.

• The Journal of the Korea institute of electronic communication sciences
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• v.8 no.10
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• pp.1477-1483
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• 2013

This paper proposes a low-voltage current-mode integrator for a continuous-time current-mode baseband channel selection filter. The low-voltage current-mode linear cascode integrator is introduced to offer advantages of high current gain and improved unity-gain frequency. The proposed current-mode integrator has fully differential input and output structure consisting of CMOS complementary circuit. Additional cascode transistors which are operated in linear region are inserted for bias to achieve the low-voltage feature. Frequency range is also controllable by selecting proper bias voltage. From simulation results, it can be noticed that the implemented integrator achieves design specification such as low-voltage operation, current gain, and unity gain frequency.

• Proceedings of the IEEK Conference
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• 1999.11a
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• pp.967-970
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• 1999

A novel linear transconductor for low-voltage low-power signal processing is proposed. The transconductor consists of a pnp differential-pair and a npn differential-pair which are biased by local negative feedback. The simulation results show that the transcondcutor with transconductance of 50 $mutextrm{s}$ has a linearity error of 0.05% and the power dissipation is 2.44 ㎽ over an input linear range from -2V to +2V at supply voltage $\pm$3V.

• The Transactions of The Korean Institute of Electrical Engineers
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• v.63 no.3
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• pp.358-366
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• 2014

This paper proposes a quasi Z-source AC-AC converter with the low DC voltage distribution capability operating as a power electronic transformer. The proposed system has configuration that the input terminals of two quasi Z-source AC-AC converters are connected in parallel, also their output terminal are connected in series. Simple control method of duty ratio was proposed for the in phase buck-boost AC voltage mode and the DC output voltage control. DSP based experiment and PSIM simulation were performed. As a result, the PSIM simulation results were same with the measured results. By controlling the duty ratio under the condition of 100 [${\Omega}$] load, quasi Z-source AC-AC converter could buck and boost the AC output voltage in phase with the AC input voltage, and the same time, the constant DC voltage could be output without affecting the AC output characteristics. And, the DC output voltage 48[V] was constantly controlled in dynamic state in case while the load is suddenly changed ($50[\Omega]{\rightarrow}100[\Omega]$). From the above result, we could know that the quasi Z-source AC-AC converter can act as a power electronic transformer with a low DC voltage distribution capability.

• Journal of the Institute of Electronics Engineers of Korea SD
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• v.38 no.4
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• pp.251-265
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• 2001

As the device scaling proceeds, the operating voltage(VDD) of giga-bit DRAMs is expected to be reduced to 1.5V or down, fir improving the device reliability and reducing the power dissipation. Therefore the low-voltage circuit design techniques are required to implement giga-bit DRAMs. In this work, state-of-art low-voltage DRAM circuit techniques are reviewed, and four kinds of low-voltage circuit design techniques are newly proposed for giga-bit DRAMs. Measurement results of test chips and SPICE simulation results are presented for the newly proposed circuit design techniques, which include a hierarchical negative-voltage word-line driver with reduced subthreshold leakage current, a two-phase VBB(Back-Bias Voltage) generator, a two-phase VPP(Boosted Voltage) generator and a bandgap reference voltage generator.

• JSTS:Journal of Semiconductor Technology and Science
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• v.15 no.6
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• pp.664-670
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• 2015

A four-times-VDD switch that supports high and low voltage mode operations is demonstrated in a generic 65 nm logic process. The proposed switch shows the robust operation for supply voltages ranging from VDD to $4{\times}VDD$. A cascaded voltage switch and a voltage doubler based charge pump generate the intermediate supply voltage levels required for the proposed high voltage switch. All the high voltage circuits developed in this work can be implemented using standard logic transistors without being subject to any voltage overstress.

• The Transactions of the Korean Institute of Electrical Engineers P
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• v.65 no.3
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• pp.178-182
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• 2016

FIDVR(Fault Induced Delayed Voltage Recovery) is a phenomenon that recovery of the system voltage level delays after the fault. Cause of FIDVR phenomenon is motor load characteristic about voltage and reactive power. In low voltage condition, the motor go to stall state that consume large amount of reactive power. As a result, the voltage recovery problem is that of repeated occurrences of sustained low voltage following faults on the system. In this paper, analysis the characteristics of the motor load. And using the korean power system actual data, perform a case studies to voltage delay recovery phenomenon alleviation method. Change of each parameters by analyzing the effect on system and selecting an influence parameter. In addition, dynamic characteristic analysis of the resulting difference in the proportion by the motor load in power systems, considering the effect on the voltage stability.