• Title/Summary/Keyword: leadframe

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Failure Path of the Brown-oxide-coated Copper-based Leadframe/EMC Interface under Mixed-Mode Loading (혼합하중 조건하에서 갈색산화물이 입혀진 구리계 리드프레임/EMC 계면의 파손경로)

  • 이호영
    • Journal of the Korean institute of surface engineering
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    • v.36 no.6
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    • pp.491-499
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    • 2003
  • Copper-based leadframe sheets were oxidized in a hot alkaline solution to form brown-oxide layer on the surface and molded with epoxy molding compound (EMC). The brown-oxide-coated leadframe/EMC joints were machined to form sandwiched double-cantilever beam (SDCB) specimens and sandwiched Brazil-nut (SBN) specimens for the purpose of measuring the fracture toughness of leadframe/EMC interfaces. The SDCB and the SBN specimens were designed to measure the fracture toughness of the leadframe/EMC interfaces under nearly mode-I loading and mixed-mode (mode I + mode II) loading conditions, respectively. Fracture surfaces were analyzed by various equipment such as glancing-angle XRD, SEM, AES, EDS and AFM to elucidate failure path. Results showed that failure occurred irregularly in the SDCB specimens, and oxidation time of 2 minutes divided the types of irregular failures into two classes. The failure in the SBN specimens was quite different from that in the SDCB specimens. The failure path in the SBN specimens was not dependent on the phase angle as well as the distance from tips of pre-cracks.

Failure Paths Analyses of the Leadframe/EMC System

  • Lee, H.Y.;Kim, S.R.
    • Journal of the Microelectronics and Packaging Society
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    • v.7 no.2
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    • pp.7-12
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    • 2000
  • Copper-based leadframe sheets were oxidized in a black-oxide forming solution, and molded with epoxy molding compound (EMC) to form sandwiched double-cantilever beam (SDCB) specimens. The adhesion strength of leadframe/EMC interface was measured in terms of fracture toughness by using SDCB specimens and the fracture surfaces were analyzed by various equipments such as glancing-angle XRD, AFM, and SEM. Results showed that three types of failure paths, which were closely related to the surface condition of leadframes before molding.

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Reliability Issue in LOC Packages

  • Lee, Seong-Min
    • Proceedings of the Materials Research Society of Korea Conference
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    • 1995.11a
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    • pp.3-3
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    • 1995
  • Plastic IC encapsulation utilizing lead on chip(LOC) die attach technique allows higher device density per unit package area, and faster current speed and easter leadframe design. Nevertheless, since the top surface of the chip is directly attached to the area of the leadframe with a double-sided adhesive tape in the LOC package, it tends to be easily damaged by the leadframe, leading to limitation in its utilization. In this work, it is detailed how the damage of the chip surface occurs, and it is influenced and improved by the LOC construct.

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Leadframe Feeder Heat Rail Design and Verification (Leadframe Feeder Heat Rail의 설계와 검증)

  • Kim, Won-Jong;Hwang, Eun-Ha
    • Journal of the Korean Society of Industry Convergence
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    • v.15 no.1
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    • pp.37-42
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    • 2012
  • Trends in semiconductor equipment industry are to reduce the cost of producing semiconductor, semiconductor process development, facility development, and the minimum investment in terms of cost and quality. Semiconductor equipments are being considered to review and development is proceeding at the same time. In the first part of the semiconductor assembly process, in which the importance of die bonding process is emerging, a wide leadframe type die bonding machine is demanded for productivity. Die bonding machine was designed through experiments and by trial and error. It costs a lot of time and financial burden. The purpose of this study is to solve these problems by using the CAE tool 3G. By using finite element method, thermal analysis of die bonding machine to the various widths leadframe die bonder machine rail is performed for design.

A Study on the Process Condition of Electropolishing for Stamping Leadframe (스탬핑 리드프레임의 전해 연마 가공조건에 관한 연구)

  • 신영의;김경섭;김헌의;류기원;장의구
    • Journal of the Korean Institute of Electrical and Electronic Material Engineers
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    • v.13 no.12
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    • pp.983-988
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    • 2000
  • The leadframe of thin plate fabricated by stamping method generates a lot of burr and stress in the processing surface because of the mold. The electropolishing equipment was produced in order to increase accuracy and surface roughness for 42%Ni-Fe leadframe. An electrolyte consisted of phosphoric acid, ethylene glycol and deionized water. Experiments were accomplished as polishing conditions were changed such as current density, polishing time, electrode gap and sample shape. The burr from the cutting was eliminated and surface characteristics of high flatness and high luster wre obtained after electropolishing. In addition, the electroplishing had good characteristic in 1.0 A current density and 4㎜ of electrode spaces, and it was affected by the composition of electrolyte and the sample shape.

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The Effect of Manipulating Package Construct and Leadframe Materials on Fracture Potential of Plastically Encapsulated Microelectronic Packages During Thermal Cycling

  • Lee, Seong-Min
    • Transactions on Electrical and Electronic Materials
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    • v.2 no.3
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    • pp.28-32
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    • 2001
  • It was studied in the present work how the thermal cycling performance of LOC (lead on chip) packages depends on the package construct or leadframe materials. First, package body thickness and Au wire diameter were manipulated for the selection of proper package design. Secondly, two different types of leadframe materials (i.e. copper and 52%Fe-48%Ni alloy) were tested to determine the better material for improved reliability margin of plastically encapsulated microelectronic packages. This work shows that manipulating package body thickness was more effective than an increase of Au wire from 23$\mu\textrm{m}$ to 33$\mu\textrm{m}$ for the prevention of wire debonding failure. Further, this work indicates that the LOC packages including the copper leadframes can be more susceptible to thermal cycling reliability degradation due to chip cracking than those including the alloy leadframes.

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Determination of the Failure Paths of Leadframe/EMC Joints

  • Lee, H.Y.;Kim, S.R.
    • Journal of the Korean institute of surface engineering
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    • v.33 no.4
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    • pp.241-250
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    • 2000
  • Popcorn cracking phenomena frequently occur in thin plastic packages during the solder reflow process, which are definitely affected by poor adhesion of Cu-based leadframe to epoxy molding compounds (EMCs). In the present work, in order to enhance the adhesion strength, a brown-oxide treatment on the Cu-based leadframe was carried out and the adhesion strength of leadframe/EMC interface was measured in terms of fracture toughness by using sandwiched double-cantilever beam (SDCB) specimens. After the adhesion tests, fracture surfaces were analyzed by SEM, AES, EDS and AFM to make the failure path clear. Results showed that failure path was closely related to the oxidation time and the interfacial fracture toughness.

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Effect of Electropolishing on Surface Quality of Stamped Leadframe (Stamped Leadframe의 표면 품질에 미치는 전해연마 효과)

  • 남형곤;박진구
    • Journal of the Microelectronics and Packaging Society
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    • v.7 no.3
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    • pp.45-54
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    • 2000
  • The effect of electropolishing far stamped leadframe on the removal of the edge burr and residual stress relief was examined. The present study showed that the electropolishing could be used for enhanced surface quality of stamped leadframes. The electropolishing was performed at the condition of 60% phosphoric acid electrolyte, 5 ampere of current and 3 cm electrode gap at $70^{\circ}C$ for 2 minutes for Alloy42 type leadframe, and $50^{\circ}C$ for 1.5 minutes for C-194 type leadframe. The FWHM values from X-ray diffraction showed that residual stress of electropolished leadframe recovered to the level of as-received raw materials and surface roughness measured by using AFM tuned out to be improved by 0.079 $\mu\textrm{m}$ and 0.014 $\mu\textrm{m}$ ($R_{rms}$) far alloy 42 and C-194 type leadframes, respectively. The plated thickness using XRF showed the improved uniformity in thickness variation by 0.4~0.5 $\mu\textrm{m}$ and grain growth, which is favorable for interface adhesion, was also observed from the bake test samples. We could certify dimensional stability of leadframe with inspection by means of 3D-topography and hardness measurements.

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Flow Analysis and Process Conditions Optimization in a Cavity during Semiconductor Chip Encapsulation (반도체 칩 캡슐화성형 유동해석 및 성형조건 최적화에 관한 연구)

  • 허용정
    • Journal of the Microelectronics and Packaging Society
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    • v.8 no.4
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    • pp.67-72
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    • 2001
  • An Effort has been made to more accurately analyze the flow in the chip cavity, particularly to model the flow through the openings in the leadframe and correctly treat the thermal boundary condition at the leadframe. The theoretical analysis of the flow has been done by using the Hele-Shaw approximation in each cavity separated by a leadframe. The cross-flow through the openings in the leadframe has been incorporated into the Hele-Shaw formulation as a mass source term. The optimization program based on the complex method integrated with flow analysis program has been successfully used to obtain the optimal filling conditions to avoid short shot.

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Failure Paths of Polymer/Roughened Metal Interfaces under Mixed-Mode Loading (혼합 하중하에서의 고분자/거친금속 계면의 파손경로)

  • Lee Ho-Young;Kim Sung-Ryong
    • Korean Journal of Materials Research
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    • v.14 no.5
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    • pp.322-327
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    • 2004
  • Copper-based leadframe sheets were oxidized in two kinds of hot alkaline solutions to form brown-oxide or black-oxide layer on the surface. The oxide coated leadframe sheets were molded with epoxy molding compound (EMC). After post mold curing, the oxide-coated EMC-leadframe joints were machined to form sandwiched Brazil-nut (SBN) specimens. The SBN specimens were used to measure the fracture toughness of the EMC/leadframe interfaces under mixed-mode (mode I + mode II) loading conditions. Fracture surfaces were analyzed by various equipment to investigate failure path. The results revealed that the failure paths were strongly dependent on the oxide type. In case of brown oxide, hackle-type failure was observed and failure path lay near the EMC/CuO interface with a little inclining to CuO at all case. On the other hand, in case of black oxide, quite different failure path was observed with respect to the distance from the tip of pre-crack and phase angle. Different failures occurred with oxide type is presumed to be due to the difference in microstructure of the oxides.