• Journal of the Korea Computer Industry Society
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• v.5 no.3
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• pp.345-354
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• 2004

In these days, such services are popularized as E-commerce, E-government, multimedia services, and home networking applications. Most web traffics generated contemporarily basically use the Hyper Text Transfer Protocol(HTTP). Unfortunately, the HTTP is improper for these applications that comprise significant components of the web traffics. In this paper, we introduce a real-time contents compression architecture that maximizes the web service performance as well as reduces the response time. This architecture is built into the linux kernel-based web accelerating module. It guarantees not only the freshness of compressed contents but also the minimum time delay using an server-state adaptive algorithm, which can determine whether the server sends the compressed message considering the consumption of server resources when heavy requests reach the web server Also, We minimize the CPU overhead of the web server by exclusively implementing the compression kernel-thread. The testing results validates that this architecture saves the bandwidth of the web server and that elapsed time improvement is dramatic.

• The KIPS Transactions:PartC
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• v.11C no.6 s.95
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• pp.781-786
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• 2004

In these days, such services are popularized as E-commerce, E- government, multimedia services, and home networking applications. Most web traffics generated contemporarily basically use the Hyper Text Transfer Protocol(HTTP). Unfortunately, the HTTP is improper for these applications that comprise significant components of the web traffics. In this paper, we introduce a real-time contents compression architecture that maximizes the web service performance as well as reduces the response time. This architecture is built into the linux kernel-based web accelerating module. It guarantees not only the freshness of compressed contents but also the minimum time delay using an server-state adaptive algorithm, which can determine whether the server sends the compressed message considering the consumption of sewer resources when heavy requests reach the web server. Also, We minimize the CPU overhead of the web server by exclusively implementing the compression kernel-thread. The testing results validates that this architecture saves the bandwidth of the web server and that elapsed time improvement is dramatic.

• Journal of Digital Convergence
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• v.11 no.11
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• pp.421-427
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• 2013

Disk Cache Manager(DCM), a functional server of microkernel based, to improve the I/O power of shared disks is designed and implemented in this work. DCM interfaces other different servers with message passing through ports by serving as a system actor the multi-thread mode on the Minix3 micro-kernel. DCM proposed in this paper uses the shared disk logically as a Seven Disk and Sodd Disk to enable parallel I/O. DCM enables the efficient placement of disk data because it raises disk cache hit-ratio by increasing the cache size when the utilization of the particular disk is high. Through experimental results, we show that DCM is quite efficient for a shared disk with higher utilization.

• Journal of Information Processing Systems
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• v.15 no.1
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• pp.151-158
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• 2019

With the recent advances of memory technologies, high-performance non-volatile memories such as non-volatile dual in-line memory module (NVDIMM) have begun to be used as an addition or an alternative to server-side storages. When these memory bus-connected storages (MBSs) are installed over non-uniform memory access (NUMA) servers, the distance between NUMA nodes and MBSs is one of the crucial factors that influence file processing performance, because the access latency of a NUMA system varies depending on its distance from the NUMA nodes. This paper presents the design and implementation of a high-performance logical volume manager for MBSs, called MBS-LVM, when multiple MBSs are scattered over a NUMA server. The MBS-LVM consolidates the address space of each MBS into a single global address space and dynamically utilizes storage spaces such that each thread can access an MBS with the lowest latency possible. We implemented the MBS-LVM in the Linux kernel and evaluated its performance by porting it over the tmpfs, a memory-based file system widely used in Linux. The results of the benchmarking show that the write performance of the tmpfs using MBS-LVM has been improved by up to twenty times against the original tmpfs over a NUMA server with four nodes.

• Convergence Security Journal
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• v.18 no.5_1
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• pp.67-73
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• 2018

From a software engineering point of view, tracing is a special form of logging that records program execution information. Tracers using dedicated hardware are often used because of the characteristics of tracers that need to generate and decode huge amounts of data in real time. Intel(R) PT uses proprietary hardware to record all information about software execution on each hardware thread. When the software execution is completed, the PT can process the trace data of the software and reconstruct the correct program flow. The hardware trace program can be integrated into the operating system, but in the case of the window system, the integration is not tight due to problems such as the kernel opening. Also, it is possible to trace only a single process and not provide a way to trace multiple process streams. In this paper, we propose a method to extend existing PT trace program to support multi - process stream traceability in Windows environment in order to overcome these disadvantages.

• Proceedings of the Korean Institute of Information and Commucation Sciences Conference
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• 2016.10a
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• pp.589-592
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• 2016

The period of the previous multi-core could be helped to improve program performance, based on the development of the hardware. However, one of the core performance enhancements for this encounter limitations and become the common way of multi-core with multiple cores. Modern programming concurrency that improves the conventional method for using threads of the kernel level in order to use the multi-core come to the fore. Using modern lightweight thread concurrency programming is to optimize the benefits of multi-core. Also sharing the absence of available data that can change is a major consideration when writing concurrent code. This paper describes the key considerations when creating a discussion concurrent code, and these issues are being supported in any way in the language of one 'go' of technologies that support the modern concurrency, and even how to write better code concurrency.

• Journal of the Korean Society of Fisheries and Ocean Technology
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• v.21 no.2
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• pp.131-136
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• 1985

The calculation of the resulting fluid motion is an important problem of ship hydrodynamics. For a partially immersed body the condition of constant pressure at the free surface can be linearized. The resulting linear boundary-value problem for the velocity potential is the Neumann-Kelvin problem. The two-dimensional Neumann-Kelvin problem is studied for the half-immersed circular cylinder by Ursell. Maruo introduced a slender body approach to simplify the Neumann-Kelvin problem in such a way that the integral equation which determines the singularity distribution over the hull surface can be solved by a marching procedure of step by step integration starting at bow. In the present pater for the two-dimensional Neumann-Kelvin problem, it has been suggested that any solution of the problem must have singularities in the corners between the body surface and free surface. There can be infinitely many solutions depending on the singularities in the coroners.