• 제목/요약/키워드: ion-implantation

검색결과 506건 처리시간 0.024초

<100>방향 실리콘 단결정에서의 저 에너지 붕소 이온 주입 공정에 대한 3차원 몬테 카를로 시뮬레이션 및 마스크 효과 (Three-dimensional monte carlo simulation and mask effect of low-energy boron ion implantation into <100>single-crystal silicon)

  • 손명식;이준하;송영진;황호정
    • 전자공학회논문지A
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    • 제32A권8호
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    • pp.94-106
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    • 1995
  • A three-dimensional(3D) Monte Carlo simulator for boron ion implantation into <100>single-crystal silicon considering the mask structure has been developed to predict the mask-dependent impurity doping profiles of the implanted boron at low energies into the reduced area according to the trend of a reduction in the size of semiconductor devices. All relevant important parameters during ion implantation have been taken into account in this simulator. These are incident energy, tilt and rotation of wafer, orientation of silicon wafer, presence of native silicon dioxide layer, dose, wafer temperature, ion beam divergence, masking thickness, and size and structure of open window in the mask. The one-dimensional(1D) results obtained by using the 3D simulator have been compared with the SIMS experiments to demonstrate its capabilities and confirem its reliability, and we obtained relatively accurate 1D doping profiles. Through these 3D simulations considering the hole structure and its size, we found the mask effects during boron ion implantation process.

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B 이온을 주입시킨 GaAs의 Photoreflectance에 관한 연구 (A study on the photoreflectance of B ion implanted GaAs)

  • 최현태;배인호
    • E2M - 전기 전자와 첨단 소재
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    • 제9권4호
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    • pp.372-378
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    • 1996
  • The phtoreflectance(PR) spectra of B ion implanted semi-insulating(SI) GaAs were studied. Ion implantation was performed by 150keV implantation energy and 1*10/aup 12/-10$^{15}$ ions/c $m^{2}$ doses. Electronic band structure was damaged by ion implantation with above 1*10$^{13}$ ions/c $m^{2}$ dose. When samples were annealed, " peak was observed at 30-40meV below band gap( $E_{g}$). It should be noted that this energy is close to the ionization energies of S $i_{As}$ , and GeAs in G $a_{As}$ which are also found as impurities in LEC GaAs, it is therefore possible that this feature is related to S $i_{As}$ , or G $e_{As}$ and B ions by implanted defect associated with them. From PR spectra of etched samples which is as-implanted by 1*10$^{14}$ and 1*10$^{15}$ ions/c $m^{2}$ dose, the depth of destroyed electronic band structure was from surface to 0.2.mu.m below surface.nic band structure was from surface to 0.2.mu.m below surface.

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낮은 에너지로 실리콘에 이온 주입된 분포와 열처리된 인듐의 거동에 관한 시뮬레이션과 모델링 (Modeling and Simulation on Ion Implanted and Annealed Indium Distribution in Silicon Using Low Energy Bombardment)

  • 정원채
    • 한국전기전자재료학회논문지
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    • 제29권12호
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    • pp.750-758
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    • 2016
  • For the channel doping of shallow junction and retrograde well formation in CMOS, indium can be implanted in silicon. The retrograde doping profiles can serve the needs of channel engineering in deep MOS devices for punch-through suppression and threshold voltage control. Indium is heavier element than B, $BF_2$ and Ga ions. It also has low coefficient of diffusion at high temperatures. Indium ions can be cause the erode of wafer surface during the implantation process due to sputtering. For the ultra shallow junction, indium ions can be implanted for p-doping in silicon. UT-MARLOWE and SRIM as Monte carlo ion-implant models have been developed for indium implantation into single crystal and amorphous silicon, respectively. An analytical tool was used to carry out for the annealing process from the extracted simulation data. For the 1D (one-dimensional) and 2D (two-dimensional) diffused profiles, the analytical model is also developed a simulation program with $C^{{+}{+}}$ code. It is very useful to simulate the indium profiles in implanted and annealed silicon autonomously. The fundamental ion-solid interactions and sputtering effects of ion implantation are discussed and explained using SRIM and T-dyn programs. The exact control of indium doping profiles can be suggested as a future technology for the extreme shallow junction in the fabrication process of integrated circuits.

고에너지비소 이온 주입후 2단계 열처리시 2차결함에 대한 연구 (A Study on Secondary Defects in Silicon after 2-step Annealing of the High Energy $^{75}AS^+$ Ion Implanted Silicon)

  • 윤상현;곽계달
    • 한국전기전자재료학회논문지
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    • 제11권10호
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    • pp.796-803
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    • 1998
  • Intrinsic and proximity gettering are popular processes to get higher cumulative production yield and usually adopt multi-step annealing and high energy ion implantation, respectively. In order to test the combined processed of these, high energy \ulcornerAs\ulcorner ion implantation and 2-step annealing process were adopted. After the ion implantation followed by 2-step annealing, the wafers were cleaved and etched with Wright etchant. The morphology of cross section on samples was inspected by FESEM. The concentration profile of As was measured by SRP. The location and type of secondary defects inspected by HRTEM were dependent on the 1st annealing temperatures. That is, a line of dislocation located at $1.5mutextrm{m}$ apart from the surface at $600^{\circ}C$ lst annealing was changed to some dislocation lines or loops nearby the surface at 100$0^{\circ}C$. The density of dislocation line was reduced but the size of the defects was enlarged as the temperature increased.

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고전 분자 동 역학 시뮬레이션을 이용한 실리콘 격자 손상과 극 저 에너지 붕소 이온 주입에 관한 연구 (A Study on the Silicon Damages and Ultra-Low Energy Boron Ion Implantation using Classical Molecular Dynamics Simulation)

  • 강정원;강유석;손명식;변기량;황호정
    • 전자공학회논문지D
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    • 제35D권12호
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    • pp.30-40
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    • 1998
  • 극 저 에너지 실리콘 이온 주입 시뮬레이션을 통하여 실리콘 내부에서 발생하는 격자 손상에 대하여 고전분자 동역학을 사용하여 시뮬레이션 하였다. 또한 최근에 개발된 EDIP 전위식이 실리콘 충돌 계산에 적합한지 여부를 분자 동역학을 사용하여 계산하였다. EDIP 전위식은 평형상태 계산에 알맞지만 충돌을 계산하는데는 적합하지 않았다. 또한 MDRANGE를 실리콘 공정에 맞도록 향상시켜 200eV, 500eV, 그리고 1000eV 에너지 붕소 이온 주입 시뮬레이션을 수행하여 실리콘 기판의 온도, 기울기 각도 및 에너지에 따른 붕소의 분포를 계산하였다. 1000eV 이하 에너지 붕소 이온 주입에서도 체널링 현상에 대한 고려가 필요하다는 것을 알 수 있었다.

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플라즈마 질소 이온 주입한 초경공구의 고속가공시 공구마멸 특성 (Tool Wear Characteristics of Tungsten Carbide Implanted with Plasma Source Nitrogen Ions in High-speed Machining)

  • 박성호;왕덕현
    • 한국기계가공학회지
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    • 제21권5호
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    • pp.34-39
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    • 2022
  • The ion implantation technology changes the chemical state of the surface of a material by implanting ions on the surface. It improves the wear resistance, friction characteristics, etc. Plasma ion implantation can effectively reinforce a surface by implanting a sufficient amount of plasma nitrogen ions and using the injection depth instead of an ion beam. As plasma ion implantation is a three-dimensional process, it can be applied even when the surface area is large and the surface shape is complicated. Furthermore, it is less expensive than competing PVD and CVD technologies. and the material is The accommodation range for the shape and size of the plasma is extremely large. In this study, we improved wear resistance by implanting plasma nitrogen ions into a carbide end mill tool, which is frequently used in high-speed machining

MeV 이온주입에 의한 Retrograde Triple-well 형성시 발생하는 결합제어 (Control of Defect Produced in a Retrograde Triple Well Using MeV Ion Implantation)

  • 정희석;고무순;김대영;류한권;노재상
    • 한국항해항만학회:학술대회논문집
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    • 한국항해항만학회 2000년도 추계학술대회논문집
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    • pp.17-20
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    • 2000
  • This study is about a retrograde triple well employed in the Cell tr. of next DRAM and flash memory. triple well structure is formed deep n-well under the light p-well using MeV ion implantation. MeV P implanted deep n-well was observed to show greatly improved characteristics of electrical isolation and soft error. Junction leakage current, however, showed a critical behavior as a function of implantation and annealing conditions. {311} defects were observed to be responsible for the leakage current. {311} defects were generated near the R$\sub$p/ (projected range) region and grown upward to the surface during annealing. This is study on the defect behavior in device region as a function of implantation and annealing conditions.

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MeV 이온주입에 의한 Retrograde Triple-well 형성시 발생하는 결함제어 (Control of Defect Produced in a Retrograde Triple Well Using MeV Ion Implantation)

  • 정희석;고무순;김대영;류한권;노재상
    • 한국전기전자재료학회:학술대회논문집
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    • 한국전기전자재료학회 2000년도 추계학술대회 논문집
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    • pp.17-20
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    • 2000
  • This study is about a retrograde triple well employed in the Cell tr. of next DRAM and flash memory. Triple well structure is formed deep n-well under the light p-well using MeV ion implantation. MeV P implanted deep n-well was observed to show greatly improved characteristics of electrical isolation and soft error. Junction leakage current, however, showed a critical behavior as a function of implantation and annealing conditions. {311} defects were observed to be responsible for the leakage current. {311} defects were generated near the R$\_$p/ (Projected range) region and grown upward to the surface during annealing. This is study on the defect behavior in device region as a function of implantation and annealing conditions.

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실리콘에 붕소의 고에너지 이온주입에 의한 농도분포에 관한 연구 (A Study of Boron Profiles by High Energy ion Implantation in Silicon)

  • 정원채
    • 한국전기전자재료학회논문지
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    • 제15권4호
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    • pp.289-300
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    • 2002
  • In this study, the experiments are carried out by boron ion implantation at energies ranging from 700keV to 2MeV in silicon. The distribution of boron profiles are measured by SIMS(Cameca 6f). Boron dopants profiles after high temp]erasure annealing are also explained by comparisons of experimental and simulated data. A new electronic stopping model for Monte Carlo simulation of high energy implantation is presented. Also the comparisons of profiles by profiles boron ion implantations are demonstrated and interpreted with theoretical models. Finally range moments of SIMS and SRP profiles are calculated and compared with simulation results.

Reverse annealing of boron doped polycrystalline silicon

  • Hong, Won-Eui;Ro, Jae-Sang
    • 한국진공학회:학술대회논문집
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    • 한국진공학회 2009년도 제38회 동계학술대회 초록집
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    • pp.140-140
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    • 2010
  • Non-mass analyzed ion shower doping (ISD) technique with a bucket-type ion source or mass-analyzed ion implantation with a ribbon beam-type has been used for source/drain doping, for LDD (lightly-doped-drain) formation, and for channel doping in fabrication of low-temperature poly-Si thin-film transistors (LTPS-TFT's). We reported an abnormal activation behavior in boron doped poly-Si where reverse annealing, the loss of electrically active boron concentration, was found in the temperature ranges between $400^{\circ}C$ and $650^{\circ}C$ using isochronal furnace annealing. We also reported reverse annealing behavior of sequential lateral solidification (SLS) poly-Si using isothermal rapid thermal annealing (RTA). We report here the importance of implantation conditions on the dopant activation. Through-doping conditions with higher energies and doses were intentionally chosen to understand reverse annealing behavior. We observed that the implantation condition plays a critical role on dopant activation. We found a certain implantation condition with which the sheet resistance is not changed at all upon activation annealing.

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