• Title/Summary/Keyword: integer translates

Search Result 3, Processing Time 0.018 seconds

FRAMES BY INTEGER TRANSLATIONS

  • Kim, J.M.;Kwon, K.H.
    • Journal of the Korean Society for Industrial and Applied Mathematics
    • /
    • v.11 no.3
    • /
    • pp.1-5
    • /
    • 2007
  • We give an elementary proof of a necessary and sufficient condition for integer translates {${\phi}(t-{\alpha})\;:\;{\alpha}{\in}{\mathbb{Z}}^d$} of ${\phi}$(t) in $L^2({\mathbb{R}}^d)$ to be a frame sequence.

  • PDF

Frame Multiresolution Analysis

  • Kim, Hong-Oh;Lim, Jae-Kun
    • Communications of the Korean Mathematical Society
    • /
    • v.15 no.2
    • /
    • pp.285-308
    • /
    • 2000
  • We generalize bi-orthogonal (non-orthogona) MRA to frame MRA in which the family of integer translates of a scaling func-tion forms a frame for the initial ladder space V0. We investigate the internal structure of frame MRA and establish the existence of a dual scaling function, and show that, unlike bi-orthogonal MRA, there ex-ists a frame MRA that has no (frame) 'wavelet'. Then we prove the existence of a dual wavelet under the assumption of the existence of a wavelet and present easy sufficient conditions for the existence of a wavelet. Finally we give a new proof of an equivalent condition for the translates of a function in L2(R) to be a frame of its closed linear span.

  • PDF

Synthesizing multi-loop control systems with period adjustment and Kernel compilation (주기 조정과 커널 자동 생성을 통한 다중 루프 시스템의 구현)

  • Hong, Seong-Soo;Choi, Chong-Ho;Park, Hong-Seong
    • Journal of Institute of Control, Robotics and Systems
    • /
    • v.3 no.2
    • /
    • pp.187-196
    • /
    • 1997
  • This paper presents a semi-automatic methodology to synthesize executable digital controller saftware in a multi-loop control system. A digital controller is described by a task graph and end-to-end timing requirements. A task graph denotes the software structure of the controller, and the end-to-end requirements establish timing relationships between external inputs and outputs. Our approach translates the end-to-end requirements into a set of task attributes such as task periods and deadlines using nonlinear optimization techniques. Such attributes are essential for control engineers to implement control programs and schedule them in a control system with limited resources. In current engineering practice, human programmers manually derive those attributes in an ad hoc manner: they often resort to radical over-sampling to safely guarantee the given timing requirements, and thus render the resultant system poorly utilized. After task-specific attributes are derived, the tasks are scheduled on a single CPU and the compiled kernel is synthesized. We illustrate this process with a non-trivial servo motor control system.

  • PDF