• Journal of Korea Society of Digital Industry and Information Management
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• v.13 no.4
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• pp.179-191
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• 2017

The purpose of this study is to investigate the change of comprehension degree about learning satisfaction and capstone class by applying the subject which draws idea for team project task in college to creative capstone design program. The Capstone Design Program is designed to train fieldworkers with creative problem solving skills and is widely applied as a problem-solving course in team-based projects. In this paper, based on the case study of the 'fusion capstone design' operated in the first semester of 2015 ~ 2017, the capstone design course was established in the course of designing ideas for problem solving. The results of this study are as follows: First, the questionnaire about capstone design instruction process, instruction method, and learning achievement satisfaction were analyzed. As a result, understanding of capstone design was found to be higher than that of class before class, and satisfaction of performance course, method of teaching performance and learning outcome were obtained.

• Educational Technology International
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• v.16 no.2
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• pp.167-181
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• 2015

The purpose of this study was to examine the effects of using learner-created DST to communicate academic information on the creativity and flow of university students. The sample consisted of 100 undergraduate students who were assigned to either the DST group or the expository instruction group. The DST group created digital stories, and the expository group were taught using an expository instructional method. An achievement test, the Creativity Personality Scale (CPS), and the Flow State Scale (FSS) were used to collect data. The results showed that the achievement scores of the DST group were higher than those of the expository group, and the scores on the patience sub-factor of the CPS of the DST group significantly differed from those of the expository instruction group. Finally, the scores on the seven sub-factors of the FSS of the DST group differed significantly from those of the expository instruction group. The findings of this study suggest that the DST can be applied as teaching and learning method in a university class.

• Proceedings of the IEEK Conference
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• 2005.11a
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• pp.643-646
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• 2005

This paper presents CARMA (Cycle-Accurate Retargetable Micro-Architecture) as efficient framework for SoC-centric pipelined instruction-set architectures. It is based on ADL (Architecture Description Language) and provides more concise and manifest semantics to describe behavior of instruction set by mixing efficiency of instruction-set simulators and flexibility of RTL simulators. It exploits new timing model method based on process scheduling so it can support general timing model with cycle accuracy for large-scaled architectures usually used in SoC multimedia chip-set. According to experiments, the proposed framework was shown to be 5.5 times faster than HDL and 2.5 times faster than System-C in simulation speed so it is applicable for complex instruction-set pipelined architectures.

• Journal of Educational Research in Mathematics
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• v.12 no.3
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• pp.313-329
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• 2002

The importance of professor's outline in a feedback instruction was examined through various documents and the way in which the evaluation was fulfilled in Korean educational environment and its reflection upon the evaluation result were investigated by means of research. Based upon the survey results in connection with the progress and basis of teachers' on the spot feedback mathematics instruction in schools, it was found that most of teachers who engaged in feedback mathematics instruction were going over the most frequently missed problems. I proposed that we should bring up the point at issue and grasp its tendency of a class and entire group's results by means of a relative comparative analysis method, and thereupon establish a fixed category and choose substantial feedback scholarship according to that category. From this basis, the sub-sequent research topics include the substantial feedback effects of the selected problems that should be given priority, a group analysed and classified by means of comparison of tendency as well as feedback outline depended on students' characteristic, and the determining factors of tendency(a condition of professors, a level of students, geographical difference(s), and gender difference(s), etc...).

• Journal of the Korean Institute of Telematics and Electronics
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• v.21 no.1
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• pp.57-61
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• 1984

This paper deals with the selection of minimal test instruction set for microprocessor data processing test. This test method is based on a function description of the instructions which are obtained from the data given by the user's manual. Selecting procedure is done in 3 steps: 1) a test execution graphs are represented on the instructions which are grouped functionally, 2) the essential graphs, the eliminable graphs, the eliminable graphs, and the eligible graphs are built, 3) optimal test instruction set from the essential graphs and the eligible graphs is defined. In the case of INTEL 8048, 50 test instructions can be selected optimally from 8048 instruction repertories (96 instructions)

• Journal of the Korean Society for information Management
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• v.20 no.1
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• pp.121-144
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• 2003

This thesis has a research focus in effectively Practicing cooperative instruction where teacher-librarians play a role. The cooperative Instruction means to practice cooperatively with the subject teachers and teacher-librarians, in teaching subject matters(Korean, English, Social studies. Science, History, and so forth), using the school library. This thesis presents three steps by theory-model-support for a practice method through developing a cooperative instruction model. This is based on curriculum which is an axis of school education and an instructional design theory which is a base theory for subject matters.

• Journal of the Korean Institute of Telematics and Electronics
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• v.27 no.7
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• pp.1015-1024
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• 1990

This paper proposes a program counter unit(PCU) on the pipelined architecture of RISC (Reduced Instruction Set Computer) type high performance processors, PCU is used for supplying instruction addresses to memory units(Instruction Cache) efficiently. A RISC processor's PCU has to compute the instruction address within required intervals continnously. So, using the method of self-generated incrementor, is more efficient than the conventional one's using ALU or private adder. The proposed PCU is designed to have the fast +4(Byte Address) operation incrementor that has no carry propagation delay. Design specifications are taken by analyzing the whole data path operation of target processor's default and exceptional mode instructions. CMOS and wired logic circuit technologic are used in PCU for the fast operation which has small layout area and power dissipation. The schematic capture and logic, timing simulation of proposed PCU are performed on Apollo W/S using Mentor Graphics CAD tooks.

• Journal of Fisheries and Marine Sciences Education
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• v.24 no.3
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• pp.446-458
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• 2012

This research aims to analyze on the instruction effectiveness of ability grouping based on 'setting' and the result is as following. Superior group had a positive effect from the aspect of self-conception, satisfaction on class, and learning attitude while average and inferior group had a negative effect from the aspect of self-conception, satisfaction on class, and learning attitude. Therefore, the point seems to be that ability-grouping class based on 'setting' only helps the students in the superior group. Therefore, it is necessary to reconsider the educational policy of variable curriculum classroom by achievement Level implemented by current ability-grouping. A method should be prepared to help all the students in superior, average, and inferior level.

• 대한공업교육학회지
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• v.33 no.1
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• pp.149-168
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• 2008

The purpose of this study is to verify the effect of PSpice instruction on academic achievement in 'Combination logic circuit' unit of 'Digital Logic Circuit' in industrial high school. Three kinds of null hypotheses were formulated. Two classes of the third grade of C technical high school in Gyeong-buk were divided into experimental group and control group in order to verify null hypotheses. In the experimental design, 'Non-equivalent control group pretest-posttest' model was utilized. This experiment was conducted for six classes, the experimental group was applied to PSpice instruction method before the circuit traning while the control group was applied to traditional lecture oriented method before the circuit traning. Window SPSS 10.0 korean language version program was used for the data analysis and independent sample t-test was used to identify the average of each group. Significance level was set to .05 level. The results obtained in this study were as follows; First, PSpice instruction had not an effect on academic achievement according to a group type. However, these instruction had an effect on the following sub-domains; the psychomotor domain. Second, PSpice instruction had not an effect on academic achievement according to a studies level. However, these instruction for middle and low level students had an effect on the cognitive and psychomotor domain, and for middle level students had an effect on the affective domain. Third, PSpice instruction had not an effect on shortening of a training requirement. However, this instruction for low level students had an effect on shortening of a training requirement. The study results of simulation instruction was chiefly efficient in the psychomotor domain. We could know that simulation instruction is efficient as went to a low level students than an upper level students. Thus, We may make the study effectiveness in various instruction method.

• Proceedings of the Korean Institute of Information and Commucation Sciences Conference
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• v.9 no.2
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• pp.436-439
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• 2005

As mobile computers and embedded systems are becoming popular recently, we need to study how to utilize the resources such as power, space, CPU clocks, and memory efficiently. In traditional embedded system development, we were interested in resource usage based on hardware but, as software is becoming more important, we need to study how to analyze the resource usage based on software. In this research, we propose a new method called 'Instruction Level Resource Usage Analysis Method' and implement it as a resource usage analysis tool called 'I-Debugger'. I-Debugger is constructed on three layers: debugging layer which controls the execution of software on instruction level, statistic layer which gathers real-time data and convert to useful information, and analysis layer which generate useful information to specific applications. We have applied the debugger to some simple problem and found that our method is useful in developing resource efficient embedded systems.