• 한국전기전자재료학회논문지
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• 제22권12호
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• pp.1009-1013
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• 2009

In this study, we have been synthesized the dielectric layer using pure organic and organic-inorganic hybrid precursor on flexible substrate for improving of the organic thin film transistors (OTFTs) and, design and fabrication of organic thin-film transistors (OTFTs) using small-molecule organic semiconductors with pentacene as the active layer with record device performance. In this work OTFT test structures fabricated on polymerized substrates were utilized to provide a convenient substrate, gate contact, and gate insulator for the processing and characterization of organic materials and their transistors. By an adhesion development between gate metal and PI substrate, a PI film was treated using $O_2$ and $N_2$ gas. The best peel strength of PI film is 109.07 gf/mm. Also, we have studied the electric characteristics of pentacene field-effect transistors with the polymer gate-dielectrics such as cyclohexane and hybrid (cyclohexane+TEOS). The transistors with cyclohexane gate-dielectric has higher field-effect mobility, $\mu_{FET}=0.84\;cm^2/v_s$, and smaller threshold voltage, $V_T=-6.8\;V$, compared with the transistor with hybrid gate-dielectric.

• 한국전기전자재료학회:학술대회논문집
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• 한국전기전자재료학회 2002년도 하계학술대회 논문집
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• pp.190-193
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• 2002

The processing technology of organic thin-film transistors (Ons) performances have improved fur the last decade. Gate insulator layer has generally used inorganic layer, such as silicon oxide which has properties of a low electrical conductivity and a high breakdown field. However, inorganic insulating layers, which are formed at high temperature, may affect other layers termed on a substrate through preceding processes. On the other hand, organic insulating layers, which are formed at low temperature, dose not affect pre-process. Known wet-processing methods for fabricating organic insulating layers include a spin coating, dipping and Langmuir-Blodgett film processes. In this paper, we propose the new dry-processing method of organic gate dielectric film in field-effect transistors. Vapor deposition polymerization (VDP) that is mainly used to the conducting polymers is introduced to form the gate dielectric. This method is appropriate to mass production in various end-user applications, for example, flat panel displays, because it has the advantages of shadow mask patterning and in-situ dry process with flexible low-cost large area displays. Also we fabricated four by four active pixels with all-organic thin-film transistors and phosphorescent organic light emitting devices.

• 한국진공학회:학술대회논문집
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• 한국진공학회 2012년도 제42회 동계 정기 학술대회 초록집
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• pp.158-158
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• 2012

A new kind of organic-inorganic hybrid polymer, poly(tetraphenyl)silole siloxane (PSS), was invented and synthesized for realization of its unique charge trap properties. The organic portions consisting of (tetraphenyl)silole rings are responsible for electron trapping owing to their low-lying LUMO, while the Si-O-Si inorganic linkages of high HOMO-LUMO gap provide the intrachain energy barrier for controlling electron transport. Such an alternation of the organic and inorganic moieties in a polymer may give an interesting quantum well electronic structure in a molecule. The PSS thin film was fabricated by spin-coating of the PSS solution in THF organic solvent onto Si-wafer substrates and curing. The electron trapping of the PSS thin films was confirmed by the capacitance-voltage (C-V) measurements performed within the metal-insulator-semiconductor (MIS) device structure. And the quantum well electronic structure of the PSS thin film, which was thought to be the origin of the electron trapping, was investigated by a combination of theoretical and experimental methods: density functional theory (DFT) calculations in Gaussian03 package and spectroscopic techniques such as near edge X-ray absorption fine structure spectroscopy (NEXAFS) and photoemission spectroscopy (PES). The electron trapping properties of the PSS thin film of quantum well structure are closely related to intra- and inter-polymer chain electron transports. Among them, the intra-chain electron transport was theoretically studied using the Atomistix Toolkit (ATK) software based on the non-equilibrium Green's function (NEGF) method in conjunction with the DFT.

• 한국정보디스플레이학회:학술대회논문집
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• 한국정보디스플레이학회 2006년도 6th International Meeting on Information Display
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• pp.1115-1118
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• 2006

Using a thermally-crosslinkable organosiloxane-based organic-inorganic hybrid material, solution processable gate dielectric layer for organic thin-film transistors (OTFTs) have been fabricated. The hybrid dielectrics are synthesized by the sol-gel process, followed by the heat-treatment at $190{\bullet}\;.{\bullet}$ To investigate the electrical property of hybrid dielectric, leakage current behavior and capacitance were measured. To fabricate coplanar-type OTFTs, Au/Cr electrode was deposited onto the heavily doped silicon substrate with the organic-inorganic hybrid dielectric layer and then ${\alpha},{\omega}-dihexylquaterthiophene$ was drop-cast between source and drain electrical performance of the fabricated transistor.

• 한국진공학회:학술대회논문집
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• 한국진공학회 2013년도 제44회 동계 정기학술대회 초록집
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• pp.465-465
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• 2013

Inorganic 물질인 SiO2 dielectric 위에 organic dielectric PVP (4-vinyphenol)를 spin coating으로 올려, inorganic/organic dielectric 형태의 double layer구조로 High-performance amorphous indiumgallium zinc oxide thin-film transistors (IGZO TFT)를 제작하여 보았다. SiO2 dielectric을 buffer layer로 80 nm, PVP는 10Wt% 400 nm로 구성하였으며, 200 nm single SiO2 dielectric과 동일한 수준의 leakage current 특성을 MIM Capacitor 구조를 통해서 확인할 수 있었다. 이 소자의 장점은 용액공정의 도입으로 공정 시간의 단축 및 원가 절감을 이룰 수 있으며, dielectric과 channel 사이의 균일한 interface의 형성으로 interface trap 개선 및 Yield 향상의 장점을 갖는다. 우리는 실험을 통해서 SiO2 buffer layer가 수직 electric field에 의한 leakage current을 제어하고, PVP dielectric은 interface를 개선하는 것을 확인하였다. Vth의 negative shift 및 slope의 향상으로 구동전압이 줄어들고, 균일한 I-V Curve 형성을 통해서 Process Yield의 향상을 확인하였다.

• 한국전기전자재료학회:학술대회논문집
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• 한국전기전자재료학회 2008년도 추계학술대회 논문집 Vol.21
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• pp.301-301
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• 2008

Ion beam (IB)-induced alignment of inorganic materials has been investigated intensively as it provides controllability in a nonstop process for producing high-resolution displays[1][2]. LC orientation via ion-beam (IB) irradiation on the nitrogen doped diamond like carbon (NDLC) thin film deposited by physical deposition method-sputtering was embodied. The NDLC thin film that was deposited by sputter showed uniform LC alignment at the 1200eV of the ion beam intensity. The pretilt angle of LC on NDLC thin films was measured with various IB exposure time and angle. The maximum pretilt angle were showed with IB irradiation angle of $45^{\circ}$ and exposure time of 62.5 sec, respectively. To show NDLC thin film stability in high temperature, thermal stability test was proceeded. The uppermost of the thermal stability of NDLC thin film was $200^{\circ}C$. In this investigation, the electro-optical (EO) characteristics of LC on NDLC thin film were measured.

• 한국진공학회:학술대회논문집
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• 한국진공학회 2011년도 제40회 동계학술대회 초록집
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• pp.118-118
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• 2011

The Nano-Floating Gate Memory(NFGM) devices with ZnO:Cu thin film embedded in Al2O3 and AlOx-SAOL were fabricated and the electrical characteristics were evaluated. To further improve the scaling and to increase the program/erase speed, the high-k dielectric with a large barrier height such as Al2O3 can also act alternatively as a blocking layer for high-speed flash memory device application. The Al2O3 layer and AlOx-SAOL were deposited by MLD system and ZnO:Cu films were deposited by ALD system. The tunneling layer which is consisted of AlOx-SAOL were sequentially deposited at $100^{\circ}C$. The floating gate is consisted of ZnO films, which are doped with copper. The floating gate of ZnO:Cu films was used for charge trap. The same as tunneling layer, floating gate were sequentially deposited at $100^{\circ}C$. By using ALD process, we could control the proportion of Cu doping in charge trap layer and observe the memory characteristic of Cu doping ratio. Also, we could control and observe the memory property which is followed by tunneling layer thickness. The thickness of ZnO:Cu films was measured by Transmission Electron Microscopy. XPS analysis was performed to determine the composition of the ZnO:Cu film deposited by ALD process. A significant threshold voltage shift of fabricated floating gate memory devices was obtained due to the charging effects of ZnO:Cu films and the memory windows was about 13V. The feasibility of ZnO:Cu films deposited between Al2O3 and AlOx-SAOL for NFGM device application was also showed. We applied our ZnO:Cu memory to thin film transistor and evaluate the electrical property. The structure of our memory thin film transistor is consisted of all organic-inorganic hybrid structure. Then, we expect that our film could be applied to high-performance flexible device.----못찾겠음......

• 한국재료학회:학술대회논문집
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• 한국재료학회 2010년도 춘계학술발표대회
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• pp.18.2-18.2
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• 2010

For the past a few years, we have intensively researched the printable inorganic conductors and ZnO-based amorphous oxide semiconductors (AOSs) for thin-film transistors. For printable conductor materials, we have focused on the aqueous Ag and Cu ink which possess a variety of advantages, comparing with the conventional metal inks based on organic solvent system. The aqueous Ag ink was designed to achieve the long-term dispersion stability using a specific polymer which can act as a dispersant and capping agent, and the aqueous Cu ink was carefully formulated to endow the oxidation stability in air and even aqueous solvent system. The both inks were successfully printed onto either polymer or glass substrate, exhibiting the superior conductivity comparable to that of bulk one. For printable ZnO-based AOSs, we have researched the noble way to resolve the critical problem, a high processing-temperature above $400^{\circ}C$, and recently discovered that Ga doping in ZnO-based AOSs promotes the formation of oxide lattice structures with oxygen vacancies at low annealing-temperatures, which is essential for acceptable thin-film transistor performance. The mobility dependence on annealing temperature and AOS composition was analyzed, and the chemical role of Ga are clarified, as are requirements for solution-processed, low-temperature annealed AOSs.

• 한국정보디스플레이학회:학술대회논문집
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• 한국정보디스플레이학회 2006년도 6th International Meeting on Information Display
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• pp.1185-1188
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• 2006

Pentacene thin film transistors (OTFTs) on flexible polyimide substrate using electroplated gate electrode and organic/high-k inorganic bilayer gate dielectric layer. Incorporation of thin atomic-layer deposited $HfO_2$ layer on the PVP organic gate dielectric layer reduced the gate leakage and as a result enhanced the current on/off ratio.

• Korean Chemical Engineering Research
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• 제50권3호
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• pp.574-581
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• 2012

OLED 소자는 수분과 산소의 침투에 의하여 유기물이 열화되어 수명이 감소하는 문제점을 가지고 있다. 이러한 문제점을 해결하기 위해서 OLED 소자의 봉지 기술이 최근 연구되고 있다. 현재 유리나 금속 용기를 이용하여 캡슐화 하는 방법이 널리 사용되고 있지만 이러한 방법으로는 유연한(flexible) 소자의 구현이 어렵기 때문에 이를 대체할 수 있는 기술들이 연구되고 있다. 박막 필름을 이용한 OLED의 봉지 기술은 유연한 디스플레이에 적용할 수 있는 기술로 사용될 수 있다. 본 연구에서는 치밀하고 결함이 없는 패시베이션(passivation) 박막을 형성하기 위해서 상온에서 증착이 가능한 PECVD를 이용한 무기 박막 증착 방법을 개발하고 증착 조건과 구조에 따른 OLED의 특성 변화를 분석하였다. 하나의 시스템에서 in-situ로 패시베이션할 수 있는 시스템 및 공정을 구축하였으며 단일 무기 박막의 WVTR(Water Vapor Transmission Rate) 값을 $1{\times}10^{-2}g/m^2{\cdot}day$ 이하로 확보하였고 제작된 박막을 패시베이션막으로 유연한 디스플레이에 적용할 수 있는 가능성을 제시하였다.