• The Transactions of the Korea Information Processing Society
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• v.5 no.11
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• pp.2823-2834
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• 1998

This paper deals with the problem of one-to-one mapping of $2^n$ task modules of a parallel program to an n-dimensional hypercube multicomputer so as to minimize to total communication cost during the execution of the task. The problem of finding an optimal mapping has been proven to be NP-complete. We first propose a graph modification technique which transfers the mapping problem in a hypercube multicomputer into the problem of finding a set of maximum cutsets on a given task graph. Using the graph modification technique, we then propose a repeated mapping scheme which efficiently finds a one-to-one mapping of task modules to a hypercube multicomputer by repeatedly applying an existing bipartitioning algorithm on the modified graph. The repeated mapping scheme is shown to be highly effective on a number of test task graphs, it increasingly outperforms the greedy and recursive mapping algorithms as the number of processors increase. The proposed algorithm is shown to be very effective for regular graph, such as hypercube-isomorphic or 'almost' isomorphic graphs and meshes; it finds optimal mapping on almost all the regular task graphs considered.

• The Journal of Korean Institute of Communications and Information Sciences
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• v.38A no.11
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• pp.919-927
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• 2013

In this paper, we present a perception-based tone mapping technique using histogram modification for displaying high dynamic range image. HDR (high dynamic range) tone mapping algorithms are used to display HDR image on LDR (low dynamic rnage) devices. Although perception-based tone mapping methods provides better performance, it dose not always produce good results for a wide variety of images. The proposed method reduces dynamic range by using the perception-based tone mapping function and histogram modification. A derivative of perception-based tone mapping function is used as constraint function of histogram and additional compensation process is performed. This method not only improves contrast by adopting different constraints on each pixel value, but also preserves more visual details. In order to prevent over enhancement, histogram modification technique is applied. Furthermore, it can control the rate of image contrast using control parameters. Subjective and objective evaluations show that proposed algorithm is better than existing algorithms.

• Journal of the Korea Society of Computer and Information
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• v.15 no.8
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• pp.23-30
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• 2010

Flash memory is non-volatile and can retain data even after system is powered off. Besides, it has many other features such as fast access speed, low power consumption, attractive shock resistance, small size, and light-weight. As its price decreases and capacity increases, the flash memory is expected to be widely used in consumer electronics, embedded systems, and mobile devices. Flash storage systems generally adopt a software layer, called FTL. In this research, we proposed a new FTL mechanism for overcoming the major drawback of conventional block mapping algorithm. In addition to the block mapping table, a index block mapping table with a small size is used to indicate sector location. The proposed indexed block mapping algorithm by adding a small size. By the simulation result, the proposed FTL provides an enhanced speed than a conventional hybrid mapping algorithm by around 45% in average, and the requirement of mapping memory is also reduced by around 12%.

• Journal of the Institute of Electronics and Information Engineers
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• v.50 no.3
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• pp.78-87
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• 2013

NAND flash memory has been widely used as a storage medium in mobile devices, PCs, and workstations due to its advantages such as low power consumption, high performance, and random accessability compared to a hard disk drive. However, NAND flash cannot support in-place update so that it is mandatory to erase the entire block before overwriting the corresponding page. In order to overcome this drawback, flash storages need a software support, named Flash Translation Layer. However, as the high performance mass NAND flash memory is getting widely used, the size of mapping tables is increasing more than the limited DRAM size. In this paper, we propose an adaptive mapping information caching algorithm based on page mapping to solve this DRAM space shortage problem. Our algorithm uses a mapping information caching scheme which minimize the flash memory access frequency based on the analysis of several workloads. The experimental results show that the proposed algorithm can increase the performance by up to 70% comparing with the previous mapping information caching algorithm.

• Proceedings of the Korea Information Processing Society Conference
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• 2017.04a
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• pp.242-245
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• 2017

기존의 엔진제어기(ECU)는 주요 mapping data(ECU에 대응되는 값)들에 대해서 기밀성과 무결성을 제공하는 보호 기법의 부재로 인해 임의적인 튜닝이 가능하다는 특징이 존재하였다. 이로 인해 자칫 잘못된 튜닝이나 악의적인 조작이 발생할 수 있는 여지가 있으며, 이는 차량 엔진 및 조작의 안정성을 떨어뜨림과 동시에 운전자 및 보행자들의 안전을 위협할 수 있다는 문제가 있다. 이에 본 논문에서는 ECU에 적용되는 Firmware의 주요 mapping data를 안전하게 암호화하는 방식을 제안하며, 이 과정에서는 차량의 식별 및 ECU에 mapping 되는 data의 무결성 검증을 위해 인증서를 사용하는 방식을 제안한다. 본 논문의 제안을 통해 주요 mapping data를 안전하게 보호하는 기술을 통해 차량의 안전성을 유지할 수 있다.

• Korean Journal of Computational Design and Engineering
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• v.9 no.3
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• pp.192-202
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• 2004

This paper introduces an approach to semantic mapping using Product ontology for CPC environment. In CPC environment, it is necessary that the participants in a product life cycle should share the same understanding about the semantic of product terms. For example, they should know that although 'COMPONENT' and 'ITEM' are different word-expressions, they could have the same meaning. In order to handle such terms in the information system, it is desirable that the system automatically recognizes that the terms have the same semantics. Serving this purpose, we described an ontology design methodology using first order logic, knowledge interchange format, and knowledge engineering process. In our approach, we investigated domain knowledge of the Bill Of Material, and then designed Product ontology of it. Based on the ontology, we described syntactic translation, semantic translation, and semantic mapping procedure with an example.

• Proceedings of the Korea Inteligent Information System Society Conference
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• 2002.05a
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• pp.115-122
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• 2002

O-R 매핑툴을 이용하면 업체별로 상이하며 가변적인 요소를 포함하는 전자 상거래 시스템을 효과적으로 구현할 수 있다. 본 논문에서는 전자상거래 시스템을 위한 범용적 O-R Mapping Tool인 Object $Organizer{\;}^{TM}$를 소개하고, 이를 설계하고 구현하기 위해 이용된 접근법에 대해 설명한다. 기존의 0-R 매핑툴에 대한 분석을 통해 사용 편의성과 수행 성능을 개선할 수 있도록 설계하였으며 전자 상거래 시스템의 구현 방법에서 일반화될 수 있는 부분을 추출하기 위하여 개발 프로세스와 구현 방식을 분석하였다. 또한 전자 상거래 시스템의 요구 사항을 충분히 반영할 수 있는 애플리케이션도메인을 선정하여 현업의 구체적인 요구 사항을 효과적으로 처리 가능하도록 설계하였다. 본 논문은 전자 상거래 시스템에 범용적으로 사용될 수 있는 O-R 매핑툴의 구현 방향을 제시했으며 Object $Organizer{\;}^{TM}$를 통해 이를 구현하였다. O-R 매핑툴의 범용성을 확보하기 위해 기존의 제품을 분석하고 전자상거래 시스템의 구현 방법을 분석하고 일반화하였으며 실제 전자 상거래 애플리케이션을 구현해 봄으로써 Object $Organizer{\;}^{TM}$의 개발 효율성을 평가하였다.

• Proceedings of the Korea Information Processing Society Conference
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• 2006.11a
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• pp.295-298
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• 2006

본 논문에서는 극 좌표계에서의 벡터 표현 방식을 이용한 per-pixel displacement mapping 방법을 제시한다. per-pixel displacement mapping은 triangle mesh의 처리 방식에 상관없이 변위매핑을 수행할 수 있도록 한 것으로, 2차원 screen space로 projection 된 triangle의 각 pixel의 위치를 객체 표면 정보에 따라 displacement 해주는 방법이다. 이는 기 검증된 범프매칭 하드웨어에 약간의 하드웨어를 추가함으로써 변위매핑을 수행할 수 있도록 한 효과적인 구조이다. 제안 방식에 의해 생성된 영상과 기존 방식에 의해 생성된 영상을 비교해본 결과, 시각적으로 거의 차이가 없음을 알 수 있다.

• Journal of Korea Society of Digital Industry and Information Management
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• v.4 no.3
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• pp.77-83
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• 2008

In this paper, CPLD low power technology mapping for reuse module design under the time constraint is proposed. Traditional high-level synthesis do not allow reuse of complex, realistic datapath component during the task of scheduling. On the other hand, the proposed algorithm is able to approach a productivity of the design the low power to reuse which given a library of user-defined datapath component and to share of resource sharing on the switching activity in a shared resource. Also, we are obtainable the optimal the scheduling result in experimental results of our using chaining and multi-cycling in the scheduling techniques. Low power circuit make using CPLD technology mapping algorithm for selection reuse module by scheduling.

• Proceedings of the Korean Information Science Society Conference
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• 2004.10a
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• pp.175-177
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• 2004

In this paper, we provide a mechanism to map topics between similar Topic Map ontologies, which enlarge the capacities of current Topic Maps. That is, there is no explicit way to map topics across multiple Topic Maps in current technology. Therefore, our approach provide semi-automatic or automatic mapping of topics between Topic Maps. In order to map the topics, we provide precise definitions of mapping properties and mapping rules.