• Proceedings of the KIPE Conference
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• 2001.10a
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• pp.708-712
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• 2001

A new phase-shifted parallel-input/series-output (PI SO) dual inductor-fed push-pull converter for high-power step­up applications is proposed. This converter is operated at a constant duty cycle and employs an auxiliary circuit to control the output voltage with a phase-shift between the two modules. It features a voltage conversion characteristic which is linear to changes in the control input, and high step-up ratio with a greatly reduced switch turn-off stress resulting in a significant increase in the converter efficiency. It also shows a low ripple content and low root-mean-square (RMS) current in the output capacitor. The operational principle is analyzed and a comparative analysis with the conventional pulse-width-modulated (PWM) PISO dual inductor-fed push-pull converter is presented. A 50kHz, 800W, 350Vdc prototype with an input of 20-32Vdc has also been constructed to validate the proposed converter. The proposed converter compares favorably with the conventional counterpart and is considered well suited to high-power step-up applications.

• The Transactions of the Korean Institute of Power Electronics
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• v.17 no.2
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• pp.182-189
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• 2012

In this paper, the input current and output voltage ripple of the soft switching interleaved boost converter was analyzed. Ripples of input current and output voltage with an interleaved method is analysed and as a result, the facts that it has lower ripple current than conventional interleaved method is verified. it means that a capacity of a main inductor can be reduced. Besides, a low capacitance of capacitor which means high lifetime and confidence can be used because of reducing ripples of output voltage. In order to verify the validity of the proposed converter used 10uF film capacitor, experiment was performed, and the efficiency of the proposed converter was measured with variable load and duty conditions.

• Proceedings of the KIEE Conference
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• 2009.07a
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• pp.963_964
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• 2009

This paper presents an output ripple reduction of Active-Clamp Forward Converter, which is mainly composed of interleaving two active-clamping forward converters. By interleaving, Output ripple is reduced. The leakage inductance of the transformer or an additional resonant inductance is employed to achieve ZVS during the dead times. The duty cycles are not limited to be equal and within 50%. The complementary switching and the resulted interleaved output inductor currents diminish the current ripple in output capacitors. Accordingly, the smaller output chokes and capacitors lower the converter volume and increase the power density. Detailed analysis of this ouput reduction of Active-Clamp Forward Converter is described.

• Transactions on Electrical and Electronic Materials
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• v.12 no.6
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• pp.262-266
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• 2011

A simulation study of a current-mode direct current (DC)-DC boost converter is presented in this paper. This converter, with a fully-integrated power module, is implemented by using bipolar complementary metal-oxide semiconductor (BiCMOS) technology. The current-sensing circuit has an op-amp to achieve high accuracy. With the sense metal-oxide semiconductor field-effect transistor (MOSFET) in the current sensor, the sensed inductor current with the internal ramp signal can be used for feedback control. In addition, BiCMOS technology is applied to the converter, for accurate current sensing and low power consumption. The DC-DC converter is designed with a standard 0.35 ${\mu}m$ BiCMOS process. The off-chip inductor-capacitor (LC) filter is operated with an inductance of 1 mH and a capacitance of 12.5 nF. Simulation results show the high performance of the current-sensing circuit and the validity of the BiCMOS converter. The output voltage is found to be 4.1 V with a ripple ratio of 1.5% at the duty ratio of 0.3. The sensing current is measured to be within 1 mA and follows to fit the order of the aspect ratio, between sensing and power FET.

• Proceedings of the KIEE Conference
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• 1992.07b
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• pp.1022-1024
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• 1992

The multiple poly-phase converters to be overcome the current limits of switching devices have the merits of the lessen weight and ripple. This paper deals with the circuit analysis of the poly-phase buck converters with discontinuous inductor current. The dc and ac models are obtained by the average method of the state equations.

• Journal of Power Electronics
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• v.13 no.1
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• pp.31-39
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• 2013

The conventional non-isolated boost converter has some drawbacks such as poor dynamic performance and a discontinuous output current, which make it unsuitable for battery charging applications. In spite of its compactness and lightness, it is not preferred as a charger of portable electronic devices. In this paper, a non-isolated boost converter topology for Li-ion batteries suitable for fuel cell powered laptop computers is proposed and analyzed. The proposed converter has an additional inductor at the output to make a continuous output current. This feature makes it suitable for charger applications by eliminating the disadvantages of the conventional non-isolated boost converter mentioned above. A prototype of the proposed converter is built for the Li-ion battery charger of a laptop computer to prove the validity and advantages of the proposed topology.

• Proceedings of the KIPE Conference
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• 2008.06a
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• pp.529-531
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• 2008

Generation system using regenerative energy like photovoltaic, fuelcell is increased, PCS technology coming into the spotlight. The efficiency of DC-DC converter as part of the PCS is very important, multi-phase boost converter has more advantage than other topology. Input current of the multi-phase boost converter is divided into two inductor current because of parallel structure of the boost converters, thus it has features of decreasing input current ripple and output voltage ripple. Also multi-phase boost converter with soft switching can decrease switching loss using ZCS and ZVS. In this paper, simulation and experiment are performed to verify operation of the proposed converter, and efficiencies of the conventional and proposed converter are compared.

• Journal of Power Electronics
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• v.14 no.1
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• pp.11-21
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• 2014

A novel switched-inductor quasi-Z-source inverter is proposed in this study. Compared with classic topologies, the boost ability of the proposed topology is strengthened. The voltage stress of the capacitors, diodes, and power devices are reduced, and the current ripple of the DC voltage source is suppressed. Conversion efficiency is also improved. The operation principle of the proposed topology is analyzed in detail and compared with that of similar topologies. The feasibility of the proposed topology is verified by simulations and experiments on a laboratory prototype.

• Proceedings of the KIPE Conference
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• 2011.07a
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• pp.25-26
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• 2011

In some cases of grid connected system using photovoltaic modules, high voltage step up ratio is required. In this paper, non-isolated 2-stage cascaded boost converter with coupled inductor is proposed. Due to reduce the input current ripple and size of the inductor by using coupled inductor method, this topology is suitable for MIC(Module Integrated Converter). The operational characteristic of the proposed topology is verified through the theorical analysis, simulation and experimental waveform.

• Proceedings of the KIPE Conference
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• 2010.11a
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• pp.74-75
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• 2010

As global warming due to burning fossil fuels and natural resource depletion issues have emerged, the development of renewable energy sources such as photovoltaics (PV) has been brought to recent interest. Amongst the vast efforts to harvest and convert solar energy into electricity, the module integrated converters (MIC) has become a worthy topic of research for grid-connected photovoltaic systems. Due to the required high-boosting qualities, only a restricted amount of DC/DC converter topologies can be applied to MICs. This paper investigates the possibility of a tapped-inductor boost converter as a candidate for PV MICs. A dual-inductor interleaving scheme operating slightly above the boundary of the two conduction modes (BCM) is suggested for reduction of input current ripple and minimization of component stress. A digital controller is used for implementation, assuring maximum power tracking and transfer while providing sufficient computational space for other grid connectivity applications, etc. For verification, a 200W converter is designed and simulated via computer software including component losses. High efficiency over a wide power range proves the feasibility of the proposed PV MIC system.