• 제목/요약/키워드: inductor current ripple

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고 효율 저 리플 전압 특성을 갖는 모바일용 동기 형 벅 컨버터 (Synchronous Buck Converter with High Efficiency and Low Ripple Voltage for Mobile Applications)

  • 임창종;김준식;박시홍
    • 전기전자학회논문지
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    • 제15권4호
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    • pp.319-323
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    • 2011
  • 본 논문에서는 Mobile 기기의 다양한 기능을 지원하기 위해 사용되는 내부 회로들의 낮은 전압 레벨을 지원하기위해 가장 널리 사용되는 SMPS(Switch Mode Power Supply)방식의 Buck converter를 설계한다. 제안된 Buck converter는 넓은 부하 영역에서 높은 효율을 가지는 것을 목적으로 일반적인 구동 방식인 PWM (Pulse Width Modulation)Mode의 고 효율 저 리플 특성 구현 외에 PFM(Pulse Frequency Modulation) Mode를 적용하여 낮은부하 조건 혹은 부하를 사용하지 않는 대기 시간에서도 고 효율 저 리플 특성을 가지는 Dual mode synchronous buck converter를 설계한다. 이를 위해 본 논문에서는 부하 변동 시에 PWM - PFM Mode로의 효율적인 변환방법 및 저 리플 특성을 위한 방법을 제안한다. 또한 제안된 IC는 Mobile 기기에 부합하는 입력 전압 범위 2.5V-5V를 가지며, 2.5Mhz의 높은 주파수로 동작하여 리플 특성이 양호하고 집적화가 유리하다. 고효율을 위하여 Synchronous Type 설계 및 Dynamic Control 방식을 적용하였다. 보호 기능으로는 회로 동작의 초기 시에 발생하는 Inrush Current를 방지하기 위한 Soft start function 외에 Current limit, Thermal shutdown function, UVLO 회로가 내장되어 신뢰성을 높였다.

Integrated Current-Mode DC-DC Buck Converter with Low-Power Control Circuit

  • Jeong, Hye-Im;Lee, Chan-Soo;Kim, Nam-Soo
    • Transactions on Electrical and Electronic Materials
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    • 제14권5호
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    • pp.235-241
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    • 2013
  • A low power CMOS control circuit is applied in an integrated DC-DC buck converter. The integrated converter is composed of a feedback control circuit and power block with 0.35 ${\mu}m$ CMOS process. A current-sensing circuit is integrated with the sense-FET method in the control circuit. In the current-sensing circuit, a current-mirror is used for a voltage follower in order to reduce power consumption with a smaller chip-size. The N-channel MOS acts as a switching device in the current-sensing circuit where the sensing FET is in parallel with the power MOSFET. The amplifier and comparator are designed to obtain a high gain and a fast transient time. The converter offers well-controlled output and accurately sensed inductor current. Simulation work shows that the current-sensing circuit is operated with an accuracy of higher than 90% and the transient time of the error amplifier is controlled within $75{\mu}sec$. The sensing current is in the range of a few hundred ${\mu}A$ at a frequency of 0.6~2 MHz and an input voltage of 3~5 V. The output voltage is obtained as expected with the ripple ratio within 1%.

N상 Interleaved Boost 컨버터의 정상상태 특성 해석 (Steady-State Analysis of N-phase Interleaved Boost Converter)

  • 박종규;장성동;신휘범;김흥근
    • 대한전기학회논문지:전기기기및에너지변환시스템부문B
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    • 제53권3호
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    • pp.196-205
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    • 2004
  • Although many papers about the interleaved boost converter(IBC) have been published, there are, unfortunately, no analytical and rigorous expressions for steady-state operation of the N-phase IBC. To understand the operating characteristics of the N-phase IBC, the averaged state equation and the general steady-state solutions are derived in this paper. The general expressions of the current unbalance due to the parameter mismatch, the inductor and input current ripples, and the output voltage ripple are also presented. Through the analytical expressions presented, the steady-state characteristics of the N-phase IBC are analyzed theoretically and verified experimentally.

이산 전류 제어를 위한 공진형 인버터 (A Simple Resonant Link Inverter for a Discrete-Time Current Control)

  • 오인환;정영석;주형길;윤명중
    • 전력전자학회논문지
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    • 제3권1호
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    • pp.36-45
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    • 1998
  • 공진형 인버터의 직류 링크단의 전압 상승을 직류 공급 전압 이내로 제한하고, 공진형 인덕터의 전류 내량을 줄이기 위한 간단한 전압 억제형 공진형 인버터를 제안하였다. 이 전압 인버터를 영구 자석형 동기 전동기(PMSM)에 적용하여 이산 펄프 제어 방법중의 하나인 예측형 전류 제어 방법에 의해 실험과 시뮬레이션을 통하여 제안된 인버터의 동작을 보이고, 그 결과를 CRDM(Current Regulated Delta Modulation)방법에 의한 결과와 비교하였다.

고장나무를 이용한 양방향 컨버터의 신뢰성 분석 (Fault-tree based reliability analysis for bidirectional converter)

  • 허대호;강필순
    • 전기전자학회논문지
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    • 제23권1호
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    • pp.254-260
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    • 2019
  • 본 논문에서는 양방향 dc-to-dc 컨버터의 고장원인, 고장영향, 고장 결과를 파악하기 위한 failure mode and effect analysis(FMEA)와 양방향 컨버터의 위험도를 고려한 fault-tree analysis(FTA)를 통해 고장률을 예측한다. 전기차의 구동전압을 효율적으로 상승시키기 위해 인버터 앞단에 부착되는 양방향 컨버터는 배터리 전력을 dc-link 커패시터로 방전시키는 승압모드와 회생전력을 배터리로 충전시키는 강압모드를 가진다. 양방향 컨버터의 동작 특성을 고려한 FMEA 결과를 바탕으로 컨버터의 위험도를 고려한 고장나무를 설계한다. 전기차 MCU용에 맞는 설계 파라메타를 설정하고 출력전압 리플과 인덕터 전류 리플에 따른 커패시터와 인덕터의 부품 고장률을 분석한다. 또한 동작 온도에 따른 주요부품의 고장률을 MIL-HDBK-217F를 이용하여 구한다. 마지막으로 부품 고장률을 고장나무의 기본 사상의 고장률로 반영하여 컨버터 고장률과 평균고장시간을 예측한다.

SMZ 하프브리지 컨버터의 공진특성 분석 (Analysis of resonant characteristics in Half-Bridge Converter using SMZ method)

  • 연재을;장도현;김희준
    • 대한전기학회:학술대회논문집
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    • 대한전기학회 2001년도 춘계학술대회 논문집 전기기기 및 에너지변환시스템부문
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    • pp.297-300
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    • 2001
  • The SMZ half-bridge converter uses the resonance between the inductance of transformer and the resonant capacitances to transfer the input power to the load. In addition to this kind of characteristic of the converter, there are some features such as the capability of soft switching operation, a lower switching loss, and a higher power density in the converter. However in the low-voltage and high-output current applications of the converter, the extremely increased output ripple voltage prevents the converter from normal operation. In order to overcome the drawback of the converter, adding the output filter inductor to the converter, the converter shows the completely different resonant characteristics. In this paper, We analyzed the resonant characteristics of the SMZ converter with the output filter inductor and investigated what the analyzed results affect the converter operation. The experiment of a I50W prototype SMZ converter with 5V output and 310V input is carried out to verity the validity of the analyzed results.

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주파수 가변 동기 정류기를 이용한 고효율 MHD 램프 안정기 (A High Efficiency MHD Lamp Ballast with a Frequency Controlled Synchronous Rectifier)

  • 현병철;이인규;조보형
    • 전력전자학회:학술대회논문집
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    • 전력전자학회 2004년도 추계학술대회 논문집
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    • pp.71-75
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    • 2004
  • In this paper, in order to develop a simple and high efficient ballast without an external igniter, a half-bridge type ballast with a coupled inductor and a frequency controlled synchronous rectifier is proposed. The internal LC resonance of the buck converter is used In generate a high voltage pulse for the ignition, and the coupled inductor filter is used for steady state ripple cancellation. Also, a synchronous buck converter is applied for the DC/DC converter stage. In order to improve the efficiency of the ballast, a frequency control method is proposed. This scheme reduces a circulation current and turn off loss of the MOSFET switch on the constant power operation, which results in increase of the efficiency of the ballast system about $4\%$, compared to a fixed frequency control. It consists a 2-stage version ballast with a PFC circuit. The results are verified with hardware experiments.

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A Novel Dual-Input Boost-Buck Converter with Coupled Inductors for Distributed Thermoelectric Generation Systems

  • Zhang, Junjun;Wu, Hongfei;Sun, Kai;Xing, Yan;Cao, Feng
    • Journal of Power Electronics
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    • 제15권4호
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    • pp.899-909
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    • 2015
  • A dual-input boost-buck converter with coupled inductors (DIBBC-CI) is proposed as a thermoelectric generator (TEG) power conditioner with a wide input voltage range. The DIBBC-CI is built by cascading two boost cells and a buck cell with shared inverse coupled filter inductors. Low current ripple on both sides of the TEG and the battery are achieved. Reduced size and power losses of the filter inductors are benefited from the DC magnetic flux cancellation in the inductor core, leading to high efficiency and high power density. The operational principle, impact of coupled inductors, and design considerations for the proposed converter are analyzed in detail. Distributed maximum power point tracking, battery charging, and output control are implemented using a competitive logic to ensure seamless switching among operational modes. Both the simulation and experimental results verify the feasibility of the proposed topology and control.

SRM 구동을 위한 향상된 C-Dump 컨버터 (An Improved C-Dump Converter for Switched Reluctance Motors)

  • 김종철;이동윤;허진;현동석
    • 대한전기학회:학술대회논문집
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    • 대한전기학회 2002년도 춘계학술대회 논문집 전기기기 및 에너지변환시스템부문
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    • pp.90-92
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    • 2002
  • This paper presents an improved C-Dump converter system for switched reluctance motors(SRM). The proposed C-Dump converter derived from the conventional converter for SRM. The proposed converter could overcome the limitation of the conventional C-Dump converter, and could reduce the whole cost of the SRM system since the voltage stress of the dump switch $T_d$ is reduced to $V_{dc}$ when compared with $2V_{dc}$ for the conventional C-Dump converter. The attractive features of the proposed converters are; high-efficient and low-cost, elimination of dump inductor, simple control strategy, smaller size arid light weight. The proposed converter is able to be fast magnetization by $2V_{dc}$, which is sum of the input voltage and charging voltage of the dump capacitor. Also, this topology has many advantages such as freewheeling of phase winding without complex control, reduction of current ripple, reduction of torque ripple, and reduction of switching frequency. Simulation demonstrates the good performance of the converter.

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Analysis and Implementation of PS-PWAM Technique for Quasi Z-Source Multilevel Inverter

  • Seyezhai, R.;Umarani, D.
    • Journal of Electrical Engineering and Technology
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    • 제13권2호
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    • pp.688-698
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    • 2018
  • Quasi Z-Source Multilevel Inverter (QZMLI) topology has attracted grid connected Photovoltaic (PV) systems in recent days. So there is a remarkable research thrust in switching techniques and control strategies of QZMLI. This paper presents the mathematical analysis of Phase shift- Pulse Width Amplitude Modulation (PS-PWAM) for QZMLI and emphasizes on the advantages of the technique. The proposed technique uses the maximum and minimum envelopes of the reference waves for generation of pulses and proportion of it to generate shoot-through pulses. Hence, it results in maximum utilization of input voltage, lesser switching loss, reduced Total Harmonic Distortion (THD) of the output voltage, reduced inductor current ripple and capacitor voltage ripple. Due to these qualities, the QZMLI with PS-PWAM emerges to be the best suitable for PV based grid connected applications compared to Phase shift-Pulse Width Modulation (PS-PWM). The detailed math analysis of the proposed technique has been disclosed. Simulation has been performed for the proposed technique using MATLAB/Simulink. A prototype has been built to validate the results for which the pulses were generated using FPGA /SPARTAN 3E.