• Proceedings of the KIEE Conference
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• 2004.07c
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• pp.2052-2054
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• 2004

The TX/RX broadband L-type circular polarization antenna using LTCC at K/Ka band has been presented. This antenna has been analyzed in compensation for LTCC with relative permittivity 5.2 and could have been integrated with RF component. As the measured 10dB impedance circular polarization bandwidth of the proposed antenna is 7%(20.8GHz${\sim}$22.2GHz) at the K band and 2.3%(30.9GHz to 31.6GHz) at the Ka band. Also the gain of the antenna is -0.7${\sim}$3.05dBi at the K band and -2.8${\sim}$1dBi at the Ka band. The purpose of the research is to design an efficient antenna structure for satellite communication at K/Ka band. the antenna should be used for both TX and RX frequency bands. The antenna will be mounted on LTCC(Low Temperature Co-fired Ceramic) so that it can be integrated with other RF circuits. This research is important because of the following reasons. 1) The frequency ranges of satellite communication tends to move up to higher frequency such as Ka band or milimeter wave band. 2) Design of antenna for smaller size, lighter weight and less loss is preferred by most RF engineers. 3) Antennas on LTCC enables to integrate the antenna with other RF circuits, and thus, one can reduce the size and loss of the RF system.

• Journal of the Korean Society for Railway
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• v.9 no.6 s.37
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• pp.761-765
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• 2006

At present, harmonic currents cause serious problems in power conversion system using the semiconductor switching device. Also some of the conversion system provokes harmonic currents against to the main power supply system and causes hindrances for the system. Main power impedance of the traditional LC passive filter method, influences on the filter characteristics and amplifies the harmonics when resonance phenomenon is occurred. And the traditional existing 2 level inverter systems show the limit in capacity of voltage and current in case of occurring sudden load change. So, to solve this problem active filter which uses cascaded H-bridge multi level inverter has been designed and ex-filter system circuits were totally investigated. With multi level active filtering system not only the size of filter but also the size of filter for transformer can be reduced by half and so as to the weight, while the capacity of inverter can be double sized and wave forms can be compensated exactly and precisely. Also by the benefit of the increase in rating capacity, the various currents owing to the load fluctuation can be dealt more steadily. In order to simulate the wave form of harmonics based on the measured data on the AC 25kV high speed Domestic Commercial railway, it was simulated with PSCAD/EMTDC and PSIM. Based on the results of this demonstration, the power supply system and inverter system would be more stable and also promoting its efficiency.

• Proceedings of the KSR Conference
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• 2007.05a
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• pp.1656-1664
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• 2007

This paper introduces a study of improvement for a defect diagnosis of the UM71C track circuit using on HSL. The track circuit on HSL has long operation section. Therefore, when the worker maintain, many times and efforts are spent. So, periodically, we have operated a inspection car. However, we don't know exactly the state changed of the inspection data when track circuit has defect. Actually, We fixed a sample area within operation section on HSL and performed the simulations for short circuit current that is reflected characteristic impedance and propagation factor. We compared the measuring data with the result of the simulation. Using verified simulation program, we estimated inspection data as the malfunction number and the change of capacity of compensation capacitor. These study need to secure of the safety as the train operation. Also, It needs to make a criteria of analysis for the maintenance through comparison simulation data and inspection data.

• The Transactions of the Korean Institute of Power Electronics
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• v.18 no.1
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• pp.10-17
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• 2013

In this paper, a new active damping method of LCL filter without capacitor voltage sensors is proposed for 3 phase PWM Inverter. Normally, L filter or LCL filter is used as an output filter of grid connected PWM inverter. An LCL filter has more excellent performance than L filter to reduce harmonic current, so the small inductance value can be used. However, the resonance problem in LCL filter is happen due to the zero impedance by the addition of LC branch. To solve the resonance problem, the various active damping method has been proposed so far. Generally, the virtual resistor active damping methods is required to additional hardware sensors for measurement of capacitor voltage and current. In this paper, the new active damping method is proposed without any capacitor voltage or current sensors. In the proposed method, the resonance component of the capacitor voltage of LCL filter can be observed by a simple MRAS(Model Reference Adaptive System) observer without additional hardware sensors, and this component is suppressed by feedforward compensation. The validity of the proposed method is proven by simulation and experiment on the 3-phase PWM inverter system.

• Journal of Preventive Medicine and Public Health
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• v.43 no.6
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• pp.479-485
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• 2010

Objectives: The Korean Genome and Epidemiology Study (KoGES), a multicenter-based multi-cohort study, has collected information on body composition using two different bioelectrical impedence analysis (BIA) machines. The aim of the study was to evaluate the possibility of whether the test values measured from different BIA machines can be integrated through statistical adjustment algorithm under excellent inter-rater reliability. Methods: We selected two centers to measure inter-rater reliability of the two BIA machines. We set up the two machines side by side and measured subjects' body compositions between October and December 2007. Duplicated test values of 848 subjects were collected. Pearson and intra-class correlation coefficients for inter-rater reliability were estimated using results from the two machines. To detect the feasibility for data integration, we constructed statistical compensation models using linear regression models with residual analysis and R-square values. Results: All correlation coefficients indicated excellent reliability except mineral mass. However, models using only duplicated body composition values for data integration were not feasible due to relatively low $R^2$ values of 0.8 for mineral mass and target weight. To integrate body composition data, models adjusted for four empirical variables that were age, sex, weight and height were most ideal (all $R^2$ > 0.9). Conclusions: The test values measured with the two BIA machines in the KoGES have excellent reliability for the nine body composition values. Based on reliability, values can be integrated through algorithmic statistical adjustment using regression equations that includes age, sex, weight, and height.

• Journal of the Institute of Electronics Engineers of Korea SD
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• v.46 no.3
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• pp.75-85
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• 2009

This work proposes a 13b 100MS/s 0.13um CMOS ADC for 3G communication systems such as two-carrier W-CDMA applications simultaneously requiring high resolution, low power, and small size at high speed. The proposed ADC employs a four-step pipeline architecture to optimize power consumption and chip area at the target resolution and sampling rate. Area-efficient high-speed high-resolution gate-bootstrapping circuits are implemented at the sampling switches of the input SHA to maintain signal linearity over the Nyquist rate even at a 1.0V supply operation. The cascode compensation technique on a low-impedance path implemented in the two-stage amplifiers of the SHA and MDAC simultaneously achieves the required operation speed and phase margin with more reduced power consumption than the Miller compensation technique. Low-glitch dynamic latches in sub-ranging flash ADCs reduce kickback-noise referred to the differential input stage of the comparator by isolating the input stage from output nodes to improve system accuracy. The proposed low-noise current and voltage references based on triple negative T.C. circuits are employed on chip with optional off-chip reference voltages. The prototype ADC in a 0.13um 1P8M CMOS technology demonstrates the measured DNL and INL within 0.70LSB and 1.79LSB, respectively. The ADC shows a maximum SNDR of 64.5dB and a maximum SFDR of 78.0dB at 100MS/s, respectively. The ABC with an active die area of $1.22mm^2$ consumes 42.0mW at 100MS/s and a 1.2V supply, corresponding to a FOM of 0.31pJ/conv-step.