• Journal of the Korean Society for Aeronautical & Space Sciences
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• v.50 no.11
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• pp.747-754
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• 2022

An experimental study was carried out to control a shock-induced boundary layer separation by utilizing the supersonic sweeping jet from the fluidic oscillator. High-speed schlieren, surface flow visualization, wall pressure measurement and precise Pitot tube measurement were applied to observe the influences of the location and the supply pressure of the fluidic oscillator on the characteristics of the oblique-shock-induced boundary layer separation. The characteristics of the separation control by the present supersonic fluidic oscillator was quantitatively analyzed by comparing with a conventional control method utilizing an air-jet vortex generator.

• Advances in aircraft and spacecraft science
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• v.10 no.1
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• pp.1-18
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• 2023

This paper investigates the integrated control of an air-breathing hypersonic vehicle considering the safety of propulsion system under acceleration. First, the vehicle/engine coupling model that contains a control-oriented vehicle model and a quasi-one-dimensional dual-mode scramjet model is established. Next, the coupling process of the integrated control system is introduced in detail. Based on the coupling model, the integrated control framework is studied and an integrated control system including acceleration command generator, vehicle attitude control loop and engine multivariable control loop is discussed. Then, the effectiveness and superiority of the integrated control system are verified through the comparison of normal case and limiting case of an air-breathing hypersonic scramjet coupling model. Finally, the main results show that under normal acceleration case and limiting acceleration case, the integrated control system can track the altitude and speed of the vehicle extremely well and adjust the angle deflection of elevator to offset the thrust moment to maintain the attitude stability of the vehicle, while assigning the two-stage fuel equivalent ratio to meet the thrust performance and safety margin of the engine. Meanwhile, the high-acceleration requirement of the air-breathing hypersonic vehicle makes the propulsion system operating closer to the extreme dangerous conditions. The above contents demonstrate that considering the propulsion system safety will make integrated control system more real and meaningful.

• The Journal of Korean Institute of Communications and Information Sciences
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• v.29 no.8C
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• pp.1210-1217
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• 2004

LILI-II stream cipher is an upgraded version of the LILI-128, one of candidates in NESSIE. Since the algorithm is a clock-controlled, the speed of the keystream data is degraded structurally in a clock-synchronized hardware logic design. Accordingly, this paper proposes a 4-bit parallel LFSR, where each register bit includes four variable data routines for feedback or shifting within the LFSR. furthermore, the timing of the proposed design is simulated using a Max+plus II from the ALTERA Co., the logic circuit is implemented for an FPGA device (EPF10K20RC240-3), and apply to the Lucent ASIC device (LV160C, 0.13${\mu}{\textrm}{m}$ CMOS ＆ 1.5v technology), and it could achieve a throughput of about 500 Mbps with a 0.13${\mu}{\textrm}{m}$ semiconductor for the maximum path delay below 1.8㎱. Finally, we propose the m-parallel implementation of LILI-II, throughput with 4, 8 or 16 Gbps (m=8, 16 or 32).

• The Journal of the Institute of Internet, Broadcasting and Communication
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• v.20 no.3
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• pp.121-127
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• 2020

The small tracking radar targets the target in a real-time, fast-moving, fast-moving target against aircraft with a large RCS that is maneuvering at low speed and a small RCS aircraft maneuvering at high speed (fighters, drones, helicopters, etc.) It is a pulsed radar that detects and tracks. Performing a performance test on a tracking radar in a real environment is expensive, and it is difficult to quantitatively measure performance in a real environment. Describes the composition of the laboratory environment's comprehensive performance test facility and the main requirements and implementation of each configuration.Anechoic chambers to simulate the room environment, simulation target generator to simulate the signal of the room target, target It is composed of a horn antenna driving device to simulate the movement of a vehicle and a Flight Motion Simulatior (FMS) to simulate the flight environment of a tracking radar, and each design and implementation has been described.

• Korean Journal of Applied Biomechanics
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• v.21 no.5
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• pp.653-660
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• 2011

The purpose of this study was to compare selected kinematic variables between male medalists and a Korean male javelin thrower at the IAAF World Championships, Daegu 2011. The three medalists and one Korean javelin thrower that participated in the Championships were videotaped using three high-speed cameras (300 frames/s, EX-F1 Exilim, Casio, Japan). The results showed that the release and attitude angles of the Korean male javelin thrower (KMJT) were greater than that of the medalists, whereas the attack angle of the KMJT was smaller than that of the medalists. This study also found that the KMJT clearly had a lower release height than the medalists. As a possible adaptation of his physique to the skill, the KMJT used a small trunk inclination angle and produced greater inclination angles at his upper extremities. These results may be linked to an increase in the release angle of the KMJT. There were some difference between the KMJT and the medalists in terms of the length and duration of the delivery phase. In harmony with the shorter length of the delivery phase, its duration was shorter for the KMJT in comparison to the medalists. Because the delivery stride is considered to be a primary generator of endpoint speed, this decrease in the delivery phase time would decrease the javelin velocity at release. The amount of time taken in the delivery phase may be a critical factor to enhance a javelin thrower's performance. Thus, rhythmic movement training specifically designed for the KMJT will help him attain an optimal throwing position.

• Journal of the Korea Society of Computer and Information
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• v.17 no.4
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• pp.11-18
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• 2012

Deep packet inspection which perform pattern matching to search for malicious patterns in the packet is most computationally intensive task. Hardware-based pattern matching is required for real-time packet inspection in high-speed network. In this paper, we have designed and implemented network intrusion detection hardware as a Microblaze-based SoC using Virtex-6 FPGA, which capture the network input packet, perform hardware-based pattern matching for patterns in the Snort rule, and provide the matching result to the software. We verify the operation of the implemented system using traffic generator and real network traffic. The implemented hardware can be used in network intrusion detection system operated in wire-speed.

• Journal of Positioning, Navigation, and Timing
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• v.11 no.2
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• pp.71-81
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• 2022

In order for electro-optical tracking system (EOTS) to have accurate target coordinate, accurate navigation results are required. If an integrated navigation system is configured using an inertial measurement unit (IMU) of EOTS and the vehicle's navigation results, navigation results with high rate can be obtained. Due to the time-delay of the navigation results of the vehicle in the EOTS and scale factor errors of the EOTS IMU in high-speed and high dynamic operation of the vehicle, it is much more difficult to have accurate navigation results. In this paper, an integrated navigation system of EOTS which compensates time-delay and scale factor error is proposed. The proposed integrated navigation system consists of vehicle's navigation system which provides time-delayed navigation results, an EOTS IMU, an inertial navigation system (INS), an augmented Kalman filter and integration Kalman filter. The augmented Kalman filter outputs navigation results, in which the time-delay of the vehicle's navigation results is compensated. The integration Kalman filter estimates position, velocity, attitude error of the EOTS INS and accelerometer bias, accelerometer scale factor error, gyro bias and gyro scale factor error from the difference between the output of the augmented Kalman filter and the navigation result of the EOTS INS. In order to check performance of the proposed integrated navigation system, simulations for output data of a measurement generator and land vehicle experiments were performed. The performance evaluation results show that the proposed integrated navigation system provides more accurate navigation results.

• Journal of the Institute of Electronics Engineers of Korea SD
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• v.40 no.6
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• pp.447-458
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• 2003

A high speed multiplier is essential basic building block for digital signal processors today. Typically iterative algorithms in Signal processing applications are realized which need a large number of multiply, add and accumulate operations. This paper describes a macro block of a parallel structured multiplier which has adopted a 32$\times$32-b regularly structured tree (RST). To improve the speed of the tree part, modified partial product generation method has been devised at architecture level. This reduces the 4 levels of compression stage to 3 levels, and propagation delay in Wallace tree structure by utilizing 4-2 compressor as well. Furthermore, this enables tree part to be combined with four modular block to construct a CSA tree (carry save adder tree). Therefore, combined with four modular block to construct a CSA tree (carry save adder tree). Therefore, multiplier architecture can be regularly laid out with same modules composed of Booth selectors, compressors and Modified Partial Product Generators (MPPG). At the circuit level new Booth selector with less transistors and encoder are proposed. The reduction in the number of transistors in Booth selector has a greater impact on the total transistor count. The transistor count of designed selector is 9 using PTL(Pass Transistor Logic). This reduces the transistor count by 50% as compared with that of the conventional one. The designed multiplier in 0.25${\mu}{\textrm}{m}$ technology, 2.5V, 1-poly and 5-metal CMOS process is simulated by Hspice and Epic. Delay is 4.2㎱ and average power consumes 1.81㎽/MHz. This result is far better than conventional multiplier with equal or better than the best one published.

• Journal of the Korea Institute of Information Security & Cryptology
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• v.28 no.1
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• pp.25-39
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• 2018

NIST(National Institute of Standards and Technology) has recently published SP 800-90B second draft which is the document for evaluating security of entropy source, a key element of a cryptographic random number generator(RNG), and provided a tool implemented on Python code. In SP 800-90B, the security evaluation of the entropy sources is a process of estimating min-entropy by several estimators. The process of estimating min-entropy is divided into IID track and non-IID track. In IID track, the entropy sources are estimated only from MCV estimator. In non-IID Track, the entropy sources are estimated from 10 estimators including MCV estimator. The running time of the NIST's tool in non-IID track is approximately 20 minutes and the memory usage is over 5.5 GB. For evaluation agencies that have to perform repeatedly evaluations on various samples, and developers or researchers who have to perform experiments in various environments, it may be inconvenient to estimate entropy using the tool and depending on the environment, it may be impossible to execute. In this paper, we propose high-speed implementations and an efficient memory usage technique for min-entropy estimation algorithm of SP 800-90B. Our major achievements are the three improved speed and efficient memory usage reduction methods which are the method applying advantages of C++ code for improving speed of MultiMCW estimator, the method effectively reducing the memory and improving speed of MultiMMC by rebuilding the data storage structure, and the method improving the speed of LZ78Y by rebuilding the data structure. The tool applied our proposed methods is 14 times faster and saves 13 times more memory usage than NIST's tool.

• Journal of Advanced Marine Engineering and Technology
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• v.41 no.1
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• pp.8-14
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• 2017

Due to the financial crisis in 2008, the world economy collapsed leading to an increase in oil prices and a decrease in freight by shipping. To overcome this crisis, major shipping companies ordered larger ships, changed their trading route and improved operating of ships to overcome deficits. In particular, low-speed navigation was much favored by many companies so that it can reduce fuel consumption. However, the long-term operation of high-speed optimized engines in low-speeds has affected the jacket cooling fresh water (J.C.F.W.) system as they fail to maintain the normal operational temperature. The temperature of J.C.F.W. system dropped leading to low temperature corrosion. As a result, when the engine is operating at minimal load the functioning of existing J.C.F.W cooler is decreased and the use of fresh water generator is substantially limited. Therefore, an improvement in the functioning of J.C.F.W. system is necessary. In this paper, in order to review the improvements required for the operation of J.C.F.W. of low-speed operating marine diesel, an experiment was conducted by comparing and analyzing the results of the main engine J.C.F.W. system of a Panamax class bulk carrier 82k and a Cape class bulk carrier 180k by installing and uninstalling the J.C.F.W. Cooler. Thus, this paper proposed an improved design of the J.C.F.W. system that is suitable for the present low-speed operation.