• Proceedings of the Materials Research Society of Korea Conference
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• 2011.05a
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• pp.3.1-3.1
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• 2011

Over the past decade, the major efforts for lowering the cost of electronics has been devoted to increasing the packaging efficiency of the integrated circuits (ICs), which is defined by the ratio of all devices on system-level board compared to the area of the board, and to working on a larger but cheaper substrates. Especially, in flexible electronics, the latter has been the favorable way along with using novel nanomaterials that have excellent mechanical flexibility and electrical properties as active channel materials and conductive films. Here, the tool for achieving large area patterning is by printing methods. Although diverse printing methods have been investigated to produce highly-aligned structures of the nanomaterials with desired patterns, many require laborious processes that need to be further optimized for practical applications, showing a clear limit to the design of the nanomaterial patterns in a large scale assembly. Here, we demonstrate the alignment of highly ordered and dense silicon (Si) NW arrays to anisotropically etched micro-engraved structures using a simple evaporation process. During evaporation, entropic attraction combined with the internal flow of the NW solution induced the alignment of NWs at the corners of pre-defined structures. The assembly characteristics of the NWs were highly dependent on the polarity of the NW solutions. After complete evaporation, the aligned NW arrays were subsequently transferred onto a flexible substrate with 95% selectivity using a direct gravure printing technique. As proof-of-concept, flexible back-gated NW field effect transistors (FETs) were fabricated. The fabricated FETs had an effective hole mobility of 0.17 $cm2/V{\cdot}s$ and an on/off ratio of ${\sim}1.4{\times}104$. These results demonstrate that our NW gravure printing technique is a simple and effective method that can be used to fabricate high-performance flexible electronics based on inorganic materials.

• Proceedings of the Korean Institute of Electrical and Electronic Material Engineers Conference
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• 2006.06a
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• pp.99-100
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• 2006

Silicon-on-insulator(SOI) MOSFET with SiGe/Si heterostructure channel is an attractive device due to its potent use for relaxing several limits of CMOS scaling, as well as because of high electron and hole mobility and low power dissipation operation and compatibility with Si CMOS standard processing. SOI technology is known as a possible solution for the problems of premature drain breakdown, hot carrier effects, and threshold voltage roll-off issues in sub-deca nano-scale devices. For the forthcoming generations, the combination of SiGe heterostructures and SOI can be the optimum structure, so that we have developed SOI n-MOSFETs with SiGe/Si heterostructure channel grown by reduced pressure chemical vapor deposition. The SOI n-MOSFETs with a SiGe/Si heterostructure are presented and their DC characteristics are discussed in terms of device structure and fabrication technology.

• Korean Journal of Materials Research
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• v.33 no.11
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• pp.491-496
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• 2023

As the demand for p-type semiconductors increases, much effort is being put into developing new p-type materials. This demand has led to the development of novel new p-type semiconductors that go beyond existing p-type semiconductors. Copper iodide (CuI) has recently received much attention due to its wide band gap, excellent optical and electrical properties, and low temperature synthesis. However, there are limits to its use as a semiconductor material for thin film transistor devices due to the uncontrolled generation of copper vacancies and excessive hole doping. In this work, p-type CuI semiconductors were fabricated using the chemical vapor deposition (CVD) process for thin-film transistor (TFT) applications. The vacuum process has advantages over conventional solution processes, including conformal coating, large area uniformity, easy thickness control and so on. CuI thin films were fabricated at various deposition temperatures from 150 to 250 ℃ The surface roughness root mean square (RMS) value, which is related to carrier transport, decreases with increasing deposition temperature. Hall effect measurements showed that all fabricated CuI films had p-type behavior and that the Hall mobility decreased with increasing deposition temperature. The CuI TFTs showed no clear on/off because of the high concentration of carriers. By adopting a Zn capping layer, carrier concentrations decreased, leading to clear on and off behavior. Finally, stability tests of the PBS and NBS showed a threshold voltage shift within ±1 V.

• Journal of Sensor Science and Technology
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• v.32 no.5
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• pp.285-289
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• 2023

Recently, the demand for lidar systems for autonomous driving is increasing, and research on Shortwave Infrared(SWIR) photodetectors for this purpose is being actively conducted. Most SWIR photodetectors currently being developed are based on InGaAs, and have the disadvantages of complex processes, high prices, and limitations in research due to monopoly. In addition, current SWIR photodetectors use lasers in the 905 nm wavelength band, which can pass through the pupil and cause damage to the retina. Therefore, it is required to develop a SWIR photodetector using a wavelength band of 1400 nm or more to be safe for human eyes, and to develop a material that can replace the proprietary InGaAs. PbS QDs are group 4-6 compound semiconductors whose absorption wavelength band can be adjusted from 1000 to 2700 nm, and have the advantage of being simple to process. Therefore, in this study, PbS QDs having an absorption wavelength peak of 1415 nm were synthesized, and a SWIR photodetector was fabricated using this. In addition, the photodetector's responsivity was improved by applying P3HT and ZnO NPs to improve electron hole mobility. As a result of the experiment, it was confirmed that the synthesized PbS QDs had excellent FWHM characteristics compared to commercial PbS QDs, and it was confirmed that the photodetector had a maximum current change of about 1.6 times.

• Journal of the Microelectronics and Packaging Society
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• v.24 no.4
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• pp.59-63
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• 2017

The n-type GaN semiconductor has excellent properties as a photoelectrode, but it has disadvantage that its reliability is deteriorated due to the photocorrosion because the oxygen reaction occurs on the surface. For this reason, there are fundamental attempts to avoid photocorrosion reaction of GaN surfaces by using the p-type GaN as a photoelectrode where hydrogen generation reaction occurs on the surface. However, p-type GaN has a problem of low efficiency because of its high resistivity and low hole mobility. In this study, we try to improve the photocurrent efficiency by activation process for the p-type GaN. The p-type GaN was annealed for 1 min. at $500^{\circ}C$ in $N_2$ atmosphere. Hall effect measurement system was used for the electrical properties and potentiostat (PARSTAT4000) was used to measure the photoelectrochemical (PEC) characteristics. Consequently, the photocurrent density was improved more than 1.5 times by improving the activation process for the p-type GaN. Also, its reliability was maintained for 3 hours.

• Proceedings of the Korean Vacuum Society Conference
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• 2014.02a
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• pp.181.2-181.2
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• 2014

A single-layer graphene has been uniformly grown on a Cu surface at elevated temperatures by thermally processing a poly (methyl methacrylate) (PMMA) film in a rapid thermal annealing (RTA) system under vacuum. The detailed chemistry of the transition from solid-state carbon to graphene on the catalytic Cu surface was investigated by performing in-situ residual gas analysis while PMMA/Cu-foil samples being heated, in conjunction with interrupted growth studies to reconstruct ex-situ the heating process. We found that the gas species of mass/charge (m/e) ratio of 15 ($CH_3{^+}$) was mainly originated from the thermal decomposition of PMMA, indicating that the formation of graphene occurs with hydrocarbon molecules vaporized from PMMA, such as methane and/or methyl radicals, as precursors rather than by the direct graphitization of solid-state carbon. We also found that the temperature for dominantly vaporizing hydrocarbon molecules from PMMA and the length of time, the gaseous hydrocarbon atmosphere is maintained, are dependent on both the heating temperature profile and the amount of a solid carbon feedstock. From those results, we strongly suggest that the heating rate and the amount of solid carbon are the dominant factors to determine the crystalline quality of the resulting graphene film. Under optimal growth conditions, the PMMA-derived graphene was found to have a carrier (hole) mobility as high as ${\sim}2,700cm^2V^{-1}s^{-1}$ at room temperature, which is superior to common graphene converted from solid carbon.

• Korean Journal of Materials Research
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• v.13 no.8
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• pp.519-523
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• 2003

We report the synthesis of cubic spinel $ZnCo_2$$O_4$thin films and the tunability of the conduction type by control of the oxygen partial pressure ratio. Zinc cobalt oxide films were grown on$ SiO_2$(200 nm)/Si substrates by reactive magnetron sputtering method using Zn and Co metal targets in a mixed Ar/$O_2$atmosphere. We found from X-ray diffraction measurements that the crystal structure of the zinc cobalt oxide films grown under an oxygen-rich condition (the $O_2$/Ar partial pressure ratio of 9/1) changes from wurtzite-type $Zn_{1-x}$ $Co_{X}$O to spinel-type $ZnCo_2$$O_4$with the increase of the Co/Zn sputtering ratio,$ D_{co}$ $D_{zn}$ . We noted that the above structural change accompanied by the variation of the majority electrical conduction type from n-type (electrons) to p-type (holes). For a fixed $D_{co}$ $D_{zn}$ / of 2.0 yielding homogeneous spinel-type $_2$O$ZnCo_4$films, the type of the majority carriers also varied, depending on the$ O_2$/Ar partial pressure ratio: p-type for an $O_2$-rich and n-type for an Ar-rich atmosphere. The maximum electron and hole concentrations for the Zn $Co_2$ $O_4$films were found to be 1.37${\times}$10$^{20}$ c $m^{-3}$ and 2.41${\times}$10$^{20}$ c $m^{-3}$ , respectively, with a mobility of about 0.2 $\textrm{cm}^2$/Vs and a high conductivity of about 1.8 Ω/$cm^{-1}$ /.

• Proceedings of the Korean Vacuum Society Conference
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• 2013.08a
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• pp.131-131
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• 2013

A single-layer graphene has been uniformly grown on a Cu surface at elevated temperatures by thermally processing a poly(methyl methacrylate) (PMMA) film in a rapid thermal annealing (RTA) system under vacuum. The detailed chemistry of the transition from solid-state carbon to graphene on the catalytic Cu surface was investigated by performing in-situ residual gas analysis while PMMA/Cu-foil samples being heated, in conjunction with interrupted growth studies to reconstruct ex-situ the heating process. The data clearly show that the formation of graphene occurs with hydrocarbon molecules vaporized from PMMA, such as methane and/or methyl radicals, as precursors rather than by the direct graphitization of solid-state carbon. We also found that the temperature for vaporizing hydrocarbon molecules from PMMA and the length of time the gaseous hydrocarbon atmosphere is maintained, which are dependent on both the heating temperature profile and the amount of a solid carbon feedstock are the dominant factors to determine the crystalline quality of the resulting graphene film. Under optimal growth conditions, the PMMA-derived graphene was found to have a carrier (hole) mobility as high as ~2,700 cm2V-1s-1 at room temperature, superior to common graphene converted from solid carbon.

• Proceedings of the Korean Vacuum Society Conference
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• 2016.02a
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• pp.292-292
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• 2016

Transition metal dichalcogenides (TMDs) with a two-dimensional layered structure have been considered highly promising materials for next-generation flexible, wearable, stretchable and transparent devices due to their unique physical, electrical and optical properties. Recent studies on TMD devices have focused on developing a suitable doping technique because precise control of the threshold voltage ($V_{TH}$) and the number of tightly-bound trions are required to achieve high performance electronic and optoelectronic devices, respectively. In particular, it is critical to develop an ultra-low level doping technique for the proper design and optimization of TMD-based devices because high level doping (about $10^{12}cm^{-2}$) causes TMD to act as a near-metallic layer. However, it is difficult to apply an ion implantation technique to TMD materials due to crystal damage that occurs during the implantation process. Although safe doping techniques have recently been developed, most of the previous TMD doping techniques presented very high doping levels of ${\sim}10^{12}cm^{-2}$. Recently, low-level n- and p-doping of TMD materials was achieved using cesium carbonate ($Cs_2CO_3$), octadecyltrichlorosilane (OTS), and M-DNA, but further studies are needed to reduce the doping level down to an intrinsic level. Here, we propose a novel DNA-based doping method on $MoS_2$ and $WSe_2$ films, which enables ultra-low n- and p-doping control and allows for proper adjustments in device performance. This is achieved by selecting and/or combining different types of divalent metal and trivalent lanthanide (Ln) ions on DNA nanostructures. The available n-doping range (${\Delta}n$) on the $MoS_2$ by Ln-DNA (DNA functionalized by trivalent Ln ions) is between $6{\times}10^9cm^{-2}$ and $2.6{\times}10^{10}cm^{-2}$, which is even lower than that provided by pristine DNA (${\sim}6.4{\times}10^{10}cm^{-2}$). The p-doping change (${\Delta}p$) on $WSe_2$ by Ln-DNA is adjusted between $-1.0{\times}10^{10}cm^{-2}$ and $-2.4{\times}10^{10}cm^{-2}$. In the case of Co-DNA (DNA functionalized by both divalent metal and trivalent Ln ions) doping where $Eu^{3+}$ or $Gd^{3+}$ ions were incorporated, a light p-doping phenomenon is observed on $MoS_2$ and $WSe_2$ (respectively, negative ${\Delta}n$ below $-9{\times}10^9cm^{-2}$ and positive ${\Delta}p$ above $1.4{\times}10^{10}cm^{-2}$) because the added $Cu^{2+}$ ions probably reduce the strength of negative charges in Ln-DNA. However, a light n-doping phenomenon (positive ${\Delta}n$ above $10^{10}cm^{-2}$ and negative ${\Delta}p$ below $-1.1{\times}10^{10}cm^{-2}$) occurs in the TMD devices doped by Co-DNA with $Tb^{3+}$ or $Er^{3+}$ ions. A significant (factor of ~5) increase in field-effect mobility is also observed on the $MoS_2$ and $WSe_2$ devices, which are, respectively, doped by $Tb^{3+}$-based Co-DNA (n-doping) and $Gd^{3+}$-based Co-DNA (p-doping), due to the reduction of effective electron and hole barrier heights after the doping. In terms of optoelectronic device performance (photoresponsivity and detectivity), the $Tb^{3+}$ or $Er^{3+}$-Co-DNA (n-doping) and the $Eu^{3+}$ or $Gd^{3+}$-Co-DNA (p-doping) improve the $MoS_2$ and $WSe_2$ photodetectors, respectively.

• Journal of the Korean Vacuum Society
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• v.14 no.2
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• pp.78-83
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• 2005

Nanometric crystalline silicon (no-Si) embedded in dielectric medium has been paid attention as an efficient light emitting center for more than a decade. In nc-Si, excitonic electron-hole pairs are considered to attribute to radiative recombination. However the surface defects surrounding no-Si is one of non-radiative decay paths competing with the radiative band edge transition, ultimately which makes the emission efficiency of no-Si very poor. In order to passivate those defects - dangling bonds in the $Si:SiO_2$ interface, hydrogen is usually utilized. The luminescence yield from no-Si is dramatically enhanced by defect termination. However due to relatively high mobility of hydrogen in a matrix, hydrogen-terminated no-Si may no longer sustain the enhancement effect on subsequent thermal processes. Therefore instead of easily reversible hydrogen, phosphorus was introduced by ion implantation, expecting to have the same enhancement effect and to be more resistive against succeeding thermal treatments. Samples were Prepared by 400 keV Si implantation with doses of $1\times10^{17}\;Si/cm^2$ and by multi-energy Phosphorus implantation to make relatively uniform phosphorus concentration in the region where implanted Si ions are distributed. Crystalline silicon was precipitated by annealing at $1,100^{\circ}C$ for 2 hours in Ar environment and subsequent annealing were performed for an hour in Ar at a few temperature stages up to $1,000^{\circ}C$ to show improved thermal resistance. Experimental data such as enhancement effect of PL yield, decay time, peak shift for the phosphorus implanted nc-Si are shown, and the possible mechanisms are discussed as well.