• Proceedings of the KSR Conference
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• 2003.05a
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• pp.450-455
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• 2003

This paper is to discuss the hardware redundancy architecture of fault-tolerance system with using redundancy. Each architecture will be studied to implement fault-tolerance in classifying hardware redundancy architecture as passive, active and hybrid hardware redundancy. Therefore Fault-Masking and Fault-Detecting Techniques in each redundancy architecture is studied.

• The Transactions of The Korean Institute of Electrical Engineers
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• v.63 no.8
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• pp.1046-1054
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• 2014

In this paper, a hardware prototype for the 10kVA 11-level MMC was built and various experimental works were conducted to verify the operation algorithms of MMC. The hardware prototype was designed using computer simulation with PSCAD/EMTDC software. After manufactured in the lab, the hardware prototype was tested to verify the modulation algorithms to form the output voltage, the balancing algorithm to equalize the sub-module capacitor voltage, and the redundancy operation algorithm to improve the system reliability. The developed hardware prototype can be utilized for analyzing the basic operation and performance improvement of MMC according to the modulation and redundancy operation scheme. It also can be utilize to analyze the basic operational characteristics of HVDC system based on MMC.

• 제어로봇시스템학회:학술대회논문집
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• 2000.10a
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• pp.111-111
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• 2000

The research of network system, being used to reduce automotive wiring harness, is reaching to the development of by-wire system. It is by-wire system that apply IVN(In-Vehicle-Network) to steering, braking system, and it has the advantage of mass-decreasing, easy to diagnose fault and so on. But until now, many developed device can't satisfied with reliability that system have ever had. So redundancy of each network module, i.e., It is only way to make backup module. This paper researches development of network module and redundancy management of backup module when error occurred for implementation of brake-by-wire system.

• ETRI Journal
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• v.31 no.3
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• pp.339-341
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• 2009

Built-in redundancy analysis (BIRA) is widely used to enhance the yield of embedded memories. In this letter, a new BIRA method for both high repair efficiency and small hardware overhead is presented. The proposed method performs redundancy analysis operations using the spare mapping registers with a covered fault list. Experimental results demonstrate the superiority of the proposed method compared to previous works.

• Proceedings of the KIPE Conference
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• 2014.07a
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• pp.209-210
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• 2014

In this paper, a hardware prototype for the 10kVA 11-level MMC was built and various experimental works were conducted to verify the operation algorithms of MMC. The hardware prototype was designed using computer simulation with PSCAD/EMTDC software. After manufactured in the lab, the hardware prototype was tested to verify the modulation algorithms to form the output voltage, the balancing algorithm to equalize the sub-module capacitor voltage, and the redundancy operation algorithm to improve the system reliability.

• Journal of the Institute of Electronics Engineers of Korea SD
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• v.48 no.8
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• pp.18-24
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• 2011

A new problem happens with the evolution of TSV based 3D IC design. The bonding process takes place which follows with the testing of design for proper connectivity in the absence of TSV redundancy. In order to achieve good yield, the design should be tested with redundancy TSV. This paper presents a wrapper cell design for redundancy TSV interconnect test. The design for test technique, in terms of hardware and software perspectives is described. The wrapper cell with hardware design can use original test patterns. However, software design has less area overhead.

• The Transactions of The Korean Institute of Electrical Engineers
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• v.63 no.12
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• pp.1640-1648
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• 2014

This paper proposes a switching frequency reduction method for MMC (Modular Multilevel Converter) utilizing redundancy operation of sub-module, which can offer reduction of voltage harmonics and switching loss. The feasibility of proposed method was verified through computer simulations with PSCAD/EMTDC software. Based on simulation analysis, a hardware scaled-model of 10kVA, DC-1000V MMC was designed and manufactured in the lab. Various experiments were conducted to verify the feasibility of proposed method in the actual hardware system. The hardware scaled-model can be effectively utilized for analyzing the performance of MMC according to the modulation scheme and redundancy operation.

• Journal of Institute of Control, Robotics and Systems
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• v.11 no.3
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• pp.200-206
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• 2005

In this paper, a redundancy management system for aircraft is studied, and FDI (Fault Detection and Isolation) algorithm of inertial sensor system is proposed. UAV system cannot allow triple or quadruple hardware redundancy due to the limitations on space and weight. In the UAV system with dual sensors, it is very difficult to identify the faulty sensor. Also, conventional FDI method cannot isolate multiple faults in a triple redundancy system. In this paper, hardware based FDI technique is proposed, which combines a parity equation approach with the wavelet based technique, which is a model-free FDI method. To verify the effectiveness of the proposed FDI method, numerical simulations are performed.

• International Journal of Aeronautical and Space Sciences
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• v.7 no.1
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• pp.73-83
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• 2006

In this paper, a redundancy management system for aircraft is studied, and fault detection and isolation algorithms of inertial sensor system are proposed. Contrary to the conventional aircraft systems, UAV system cannot allow triple or quadruple hardware redundancy due to the limitations on space and weight. In the UAV system with dual sensors, it is very difficult to identify the faulty sensor. Also, conventional fault detection and isolation (FDI) method cannot isolate multiple faults in a triple redundancy system. In this paper, two FDI techniques are proposed. First, hardware based FDI technique is proposed, which combines a parity equation approach with a wavelet based technique. Second, analytic FDI technique based on the Kalman filter is proposed, which is a model-based FDI method utilizing the threshold value and the confirmation time. To provide the reference value for detecting the fault, residuals are calculated using the extended Kalman filter. To verify the effectiveness of the proposed FDI methods, numerical simulations are performed.

• The Journal of Korean Institute of Communications and Information Sciences
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• v.17 no.11
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• pp.1279-1289
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• 1992

Fault-tolerant system in improved the reliability and safety by using hardware and software redundancy. Fault mask and detection, identification techniques are conditionally used with system's application areas. Here DMR system is operated with standby and fail-safe module method that has minimal hardware and software redundancy, then its reliablity and safety comparison is presented respectively. Also this paper proposed an effective methods of dealing with transient faults as compared system's MTTFs to transient faults tolerance capabilities of self-diagnosis program.