• Proceedings of the IEEK Conference
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• 2003.07b
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• pp.1007-1010
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• 2003

This paper presents in-circuit system-on-chip verification and debugging environment. To maximize the emulation speed, the software part is compiled natively for the host computer and the hardware part is mapped into FPGA. The two parts communicate with each other in transaction level. The operation of the hardware part and the software part is recorded independently during the emulation, and after the emulation is over, they are merged in a waveform to give user a unified view that covers both hardware and software.

• Journal of Information Processing Systems
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• v.8 no.1
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• pp.133-144
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• 2012

In order to make cognitive radio systems a practical technology to be deployed in real-world scenarios, the core Software Defined Radio (SDR) systems must meet the stringent requirements of the target application, especially in terms of performance and energy consumption for mobile platforms. In this paper we present a feasibility study of hardware acceleration as an energy-efficient implementation for SDR. We identified the amplifier function from the Software Communication Architecture (SCA) for hardware acceleration since it is one of the functions called for most frequently and it requires intensive floating-point computation. Then, we used the Virtex5 Field-Programmable Gate Array (FPGA) to perform a comparison between compiler floating-point support and the on-chip floating-point support. By enabling the on-chip floating-point unit (FPU), we obtained as high as a 2X speedup and 50% of the overall energy reduction. We achieved this with an increase of the power consumption by no more than 0.68%. This demonstrates the feasibility of the proposed approach.

• The Journal of Korean Institute of Communications and Information Sciences
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• v.26 no.9B
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• pp.1308-1313
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• 2001

It is essential design process to analyze processing load and set up top level software and hardware mapping using main parameters before implementation of the SAR processor. This paper identifies the requirements upon the software and hardware mapping to be assessed and suggests its practical method to the SAR processor. Also, simulation is performed to the E-SAR processor to examine the practicability of the method and the results are discussed. Thus, this method can be applied to the SAR processor.

• International journal of advanced smart convergence
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• v.9 no.2
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• pp.114-122
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• 2020

When replacing hardware due to obsolescence, discontinuation, and expansion of software-equipped electronic equipment, software changes are required in the past, but if virtualization technology is applied, it can be applied without software changes. In this regard, we studied in order to apply virtualization technology in the development of naval multi-function radar signal processing, we studied hardware and OS independency for Docker and performance comparison between Docker and virtual machine. As a result, it was confirmed that hardware and OS independence exist when using Docker and that high-speed processing is possible compared to the virtual machine.

• Proceedings of the IEEK Conference
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• 2002.07a
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• pp.305-308
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• 2002

This paper proposes a control board that includes PNP function with extensibility and effective allocation of allocation. The object of study is to overcome limited extensity of old systems and it is to reuse the system. The system recognizes automatic subsystem from application of main system with board level that is using hardware and software co-design method. The system has both function of main-board and sub-board. So one system can operate simultaneously such as module of alien system. This system has advantages that are fast execution, according as process functional partition to hardware/ software co-design and board size is reduced as well as offer extensity of development system. We obtained good result with control board for existent Z-80 training kit.

• Proceedings of the KSR Conference
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• 2004.06a
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• pp.837-841
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• 2004

In order to improve the speed of railway, several parameters and/or technical issues, which are affecting speed improvement negatively, need to be considered in addition to the enhancement of physical performance of the railway system such as maximum speed, speed at curve, and speed at turnout track. The parameters under complicated situation of railway system are from the areas of rolling stocks, track, power system, signalling, etc. In general, two different aspects of technical issues can be evaluated; Technical issues in the hardware aspect and technical issues in the software aspect. The hardware parameters include running performance, braking performance, and power performance, while the software factors are rules, regulations, and riding quality. In this investigation, a comparison study between hardware and software aspects in technical issues was conducted to provide technical information on the amendment of railway speed-up regulations.

• ETRI Journal
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• v.28 no.4
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• pp.525-528
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• 2006

In this letter, we present a design of a single chip video decoder called advanced mobile video ASIC (A-MoVa) for mobile multimedia applications. This chip uses a mixed hardware/software architecture to improve both its performance and its flexibility. We designed the chip using a partition between the hardware and software blocks, and developed the architecture of an H.264 decoder based on the system-on-a-chip (SoC) platform. This chip contains 290,000 logic gates, 670,000 memory gates, and its size is $7.5\;mm{\times}7.5\;mm$ (using 0.25 micron 4-layers metal CMOS technology).

• Proceedings of the Korean Institute of Information and Commucation Sciences Conference
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• 2011.05a
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• pp.641-642
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• 2011

This paper presents method of constructing the embedded systems based on hardware-software codesign which is the important fields of $21^{st}$ information technology. First, we describe the classification and necessity of embedded systems, and we discuss the consideration and classification for constructing the embedded systems. Also, we discuss the embedded systems modeling. The proposed embedded systems based on hardware-software co-design is important gradually, we expect that it involve the many IT fields in the future.

• Proceedings of the Korean Institute of Information and Commucation Sciences Conference
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• 2013.10a
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• pp.880-881
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• 2013

This paper present a method of constructing embedded system based on the hardware and software which is a center of 21th information technology. For the purpose of that, we discuss the embedded system classification and necessity also the main points which is the key when we constructing the embedded system. We discuss the embedded system modelling. The proposed hardware and software embedded system be able to contribute future advanced information technology upcoming.

• IEMEK Journal of Embedded Systems and Applications
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• v.6 no.6
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• pp.361-367
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• 2011

In this paper, we propose an interactive embedded system framework for efficient training management in u-health environment. First, we analyzed various requirements of smart training systems for quality of life. We also analyzed the oversea trends and positive effects of the embedded system in terms of both technical and economical factors. Second, we proposed detailed design specification for embedded hardware implementation. Third, we developed effective OS(Operating System) specification for the embedded hardware. Finally, we developed a training scenario and embedded applications such as training control software and analysis software for the smart training systems.