• 제목/요약/키워드: half-bridge circuit

검색결과 246건 처리시간 0.025초

Compensation of Current Offset Error in Half-Bridge PWM Inverter for Linear Compressor

  • Kim, Dong-Youn;Im, Won-Sang;Hwang, Seon-Hwan;Kim, Jang-Mok
    • Journal of Power Electronics
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    • 제15권6호
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    • pp.1593-1600
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    • 2015
  • This paper proposes a novel compensation algorithm of current offset error for single-phase linear compressor in home appliances. In a half-bridge inverter, current offset error may cause unbalanced DC-link voltage when the DC-link is comprised of two serially connected capacitors. To compensate the current measurement error, the synchronous reference frame transformation is used for detecting the measurement error. When an offset error occurs in the output current of the half-bridge inverter, the d-axis current has a ripple with frequency equal to the fundamental frequency. With the use of a proportional-resonant controller, the ripple component can be removed, and offset error can be compensated. The proposed compensation method can easily be implemented without much computation and additional hardware circuit. The validity of the proposed algorithm is verified through experimental results.

LCD/PDP TV 전원장치용 고전압 구동 IC (High Voltage Driver IC for LCD/PDP TV Power Supply)

  • 송기남;이용안;김형우;김기현;서길수;한석붕
    • 한국전기전자재료학회:학술대회논문집
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    • 한국전기전자재료학회 2009년도 하계학술대회 논문집
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    • pp.11-12
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    • 2009
  • In this paper, we propose a high voltage driver IC(HVIC) for LCD and PDP TV power supply. The proposed circuit is included novel a shoot-through protection and a pulse generation circuit for the high voltage driver IC. The proposed circuit has lower variation of dead time and pulse-width about a variation of a process and a supply voltage than a conventional circuit. Especially, the proposed circuit has more excellent pulse-width matching of set and reset signals than the conventional circuit. Also the proposed pulse generation circuit prevent from fault operations using a logic gate. Dead time and pulse-width of the proposed circuit are typical 250 ns, and its variation is maximum 170 ns(68 %) about a variation of a process and a supply voltage. The proposed circuit is designed using $1\;{\mu}m$ 650 V BCD process parameter, and a simulation is carried out using Spectre.

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다중공진회로를 이용한 고효율 DC-DC 컨버터 (High-Efficiency DC-DC Converter using the Multi-Resonant-Circuit)

  • 정강률
    • 전기전자학회논문지
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    • 제25권1호
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    • pp.218-228
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    • 2021
  • 본 논문에서는 다중공진회로를 이용한 고효율 DC-DC 컨버터를 제안한다. 제안한 컨버터는 하프브리지 전력구조이며 컨버터의 고효율화를 위해 2개의 인덕터(LL)와 1개의 커패시터(C)로 구성된 다중공진회로를 이용한다. 이 다중공진회로는 동작모드에 따라, 각각의 공진주파수를 가진 직렬회로 형태의 공진회로를 각각 형성한다. 본 논문에서는 먼저, 동작모드와 정상상태 기본파 근사 모델링에 의해 제안한 컨버터의 동작원리를 설명한다. 그다음 이에 근거하여 제안한 컨버터의 설계예시를 보인다. 그리고 설계된 회로 파라미터에 의해 제작된 프로토타입 컨버터의 실험결과를 통하여 제안한 컨버터의 고효율 DC-DC 전력변환 동작특성을 입증한다.

고효율 공진형 비대칭 하프브리지 플라이백컨버터 (High Efficiency Resonant Asymmetrical Half-Bridge Flyback Converter)

  • 정강률;유두희
    • 조명전기설비학회논문지
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    • 제24권4호
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    • pp.81-94
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    • 2010
  • 본 논문에서는 고효율 공진형 비대칭 하프브리지 플라이백컨버터가 제안된다. 컨버터의 1차측 하프브리지 회로는 공진커패시턴스와 변압기 누설인덕턴스를 이용하여 비대칭 펄스폭변조(PWM; Pulse-Width Modulation) 방식에 의한 소프트스위칭 형태로 동작한다. 그리고 컨버터 2차측의 플라이백 회로는 간단한 구동회로에 의해 새로운 전압구동방식으로 동작하는 동기정류기를 이용한다. 제안된 컨버터는 이렇게 하여 컨버터의 전체효율을 향상시킨다. 또한 본 논문에서는 제안된 컨버터의 동작원리를 모드별로 설명하고 컨버터 설계 시의 고려사항과 프로토타입 컨버터의 설계 예를 각각 제시한다. 그리고 본 논문에서 제안하는 전압구동방식으로 동작하는 동기정류기의 간단한 구동기법에 관하여 간략하게 설명한다. 설계된 프로토타입 컨버터는 광범위 입력전압(교류 $V_{in,rms}$=75~265[V])이 가능하며 5[V]의 직류 출력전압과 100[W]의 출력전력을 가진다. 제안된 컨버터의 우수한 성능을 입증하기 위하여 설계된 파라미터로써 프로토타입 컨버터를 제작하여 실험하였으며, 이를 통하여 제안된 컨버터의 우수한 성능을 보인다.

내부 손실 저항이 있는 정상상태 모델을 이용한 LLC 공진형 하프 브리지 dc-dc컨버터의 최적 설계에 관한 연구 (A Study on the Optimal Design of LLC Resonant Half-bridge dc-dc Converter Using a Steady-state Model with Internal Loss Resistors)

  • 유정상;안태영
    • 반도체디스플레이기술학회지
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    • 제21권3호
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    • pp.80-86
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    • 2022
  • In this paper, the optimal design and circuit simulation verification results of an LLC resonant half-bridge dc-dc converter using a steady-state model with internal loss resistance are reported. Above all, the input/output voltage gain and frequency characteristic equations in the steady-state were derived by reflecting the internal loss resistance in the equivalent circuit. Based on the results, an LLC resonant half-bridge dc-dc converter with an input voltage of 360-420V, an output voltage of 54V, and a maximum power of 3kW was designed, and to verify the design, the PSIM circuit simulation was executed to compare and analyze the result. In particular, the operating range of the converter could be drawn from the frequency characteristic graph of the voltage gain, and when the converter was operated under light and maximum load conditions, it was confirmed that similar results were obtained by comparing simulation results and calculation results in the switching frequency characteristic graph. In addition, the change of the switching frequency with respect to the load current at each input voltage was compared with the calculated value and the simulation result. As a result, it was possible to confirm the usefulness of the analysis result reflecting the internal loss resistance proposed in this paper and the process of the optimal design.

단일 전류센서를 갖는 저가의 단상 반브릿지 APF (Low-cost Single-Phase HAIf-bridge Active Power Filter with One Current Sensor)

  • 김길동;신정렬;이우동;박현준;김희중
    • 한국철도학회논문집
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    • 제7권3호
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    • pp.173-179
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    • 2004
  • This paper describes a low-cost single-phase active power filter, which consists of a half-bridge PWM inverter with a simple control circuit. In order to verify the performance of proposed active power filter, many computer simulations with EMTP codes and experimental works with a hardware prototype were done. Both results confirm that the proposed active power filter shows excellent performance to eliminate the harmonics generated in the single-phase non-linear load. The active power filter has advantage of low implementation cost and compact size, using a half-bridge inverter and a simple control circuit with only one current sensor. So, it can be fabricated as a plug-in type. This paper shows the necessity and a good possibility to apply such advantage to the electric railway system.

A New Frequency Controlled Half-bridge Converter with Hold-up Time Extension Circuit

  • Kim, Duk-You;Kim, Jae-Kuk;Lee, Woo-Jin;Moon, Gun-Woo
    • 전력전자학회:학술대회논문집
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    • 전력전자학회 2008년도 하계학술대회 논문집
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    • pp.382-384
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    • 2008
  • Hold-up time is a special requirement for the front end DC/DC converter in a server power supply. It forces the converter with the variable switching frequency to operate in a wide switching frequency range, which makes the regulation difficult and reduces the power density. In this paper a novel frequency controlled half bridge converter with the hold-up time extension circuit is proposed. During the hold-up time, the auxiliary switches are turned on, thus the resonant inductance is reduced and the voltage conversion ratio is increased. Therefore, the output capacitor of the power factor correction (PFC) circuit can be decreased, and the converter can have high power density. The proposed converter is verified by experimental results from a prototype with 700W, 400V input, and 12V output.

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The development of a high efficient transcranial magnetic stimulation adopted real time-charging-discharging circuit

  • Kim, Whi-Young;Park, Sung-Joon
    • 전기전자학회논문지
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    • 제14권2호
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    • pp.9-15
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    • 2010
  • In this study, we have been proposed the new type of a transcranial magnetic stimulation adopted a variable voltage capacitor with Cockcroft-Walton circuit and constant-frequency current resonant half-bridge inverter. This a transcranial magnetic stimulation has some merits compared with the conventional one. First, it doesn't require the high voltage transformer. And second, it has less switching losses, compact size and capability in adjusting the transcranial magnetic stimulation output energy precisely. In this paper, we have performed the output characteristics of a transcranial magnetic stimulation system which is well known as magnetic stimulation. The tested results are described as a function of pulse repetition rate and switching numbers of the half-bridge inverter.

Single-Stage Half-Bridge Electronic Ballast Using a Single Coupled Inductor

  • Cho, Yong-Won;Kwon, Bong-Hwan
    • Journal of Power Electronics
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    • 제12권5호
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    • pp.699-707
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    • 2012
  • This paper proposes a single-stage half-bridge electronic ballast with a high power factor using only a single coupled inductor. Compared to conventional high power factor electronic ballasts, the proposed ballast is a simpler circuit with a low cost and a high reliability. The proposed ballast is made up of a power-factor-correction (PFC) circuit and a self-oscillating class-D inverter. The PFC and inverter stages of the proposed ballast are simplified by sharing only a single coupled inductor and two common switches. The proposed PFC circuit can achieve a high power factor and low voltage stresses of the switches. A saturable transformer in the self-oscillating class-D inverter determines the switching frequency of the ballast. Experimental results obtained on a 30W fluorescent lamp are discussed.

Analysis of an Interleaved Resonant Converter for High Voltage and High Current Applications

  • Lin, Bor-Ren;Chen, Chih-Chieh
    • Journal of Electrical Engineering and Technology
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    • 제9권5호
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    • pp.1632-1642
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    • 2014
  • This paper presents an interleaved resonant converter to reduce the voltage stress of power MOSFETs and achieve high circuit efficiency. Two half-bridge converters are connected in series at high voltage side to limit MOSFETs at $V_{in}/2$ voltage stress. Flying capacitor is used between two series half-bridge converters to balance two input capacitor voltages in each switching cycle. Variable switching frequency scheme is used to control the output voltage. The resonant circuit is operated at the inductive load. Thus, the input current of the resonant circuit is lagging to the fundamental input voltage. Power MOSFETs can be turn on under zero voltage switching. Two resonant circuits are connected in parallel to reduce the current stress of transformer windings and rectifier diodes at low voltage side. Interleaved pulse-width modulation is adopted to decrease the output ripple current. Finally, experiments are presented to demonstrate the performance of the proposed converter.