• 한국초전도ㆍ저온공학회논문지
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• 제20권3호
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• pp.5-10
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• 2018

This study presents that various grain boundary junctions are prepared by controlling the seed orientation combined with an artificial hole in a melt process REBCO bulk superconductor. Large grain YBCO superconductors have been fabricated with various grain boundary junctions that the angle between the grain boundary and the <001> axis of Y123 crystal is $0^{\circ}$, $30^{\circ}$ and $45^{\circ}$, respectively. The presence of the artificial hole is beneficial for the formation of clean grain boundary junction and single peak trapped magnetic field profiles have been obtained. Artificial hole makes two growth fronts meet at a point on a periphery of the artificial hole. The presence of artificial hole is not likely to affect on the distribution of Y211 particles. The newly formed <110> facet lines are explained by the formation of new Y123/liquid interface with (010) crystallographic plane.

• 한국전기전자재료학회논문지
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• 제12권1호
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• pp.35-43
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• 1999

Microstructures and dielectric properties of (Sr$\_$1-x/Ca$\_$x/) TiO$_3$-0.006Nb$_2$O$\_$5/ (0.05$\leq$x$\leq$0.2) boundary layer ceramics were investigated. The samples fired in a reducing atmosphere(N$_2$) were painted on the surface with CuO paste for the subsequent grain boundary diffusion, and then annealed at 1100$^{\circ}C$ for 2 hrs. The metal oxide of CuO infiltrated by thermal diffusion from surface of sample presents continuously in not grain but only grain boundary, and makes up thin boundary phase. The SEM photo, and EDAX revealed that CuO was penetrated rapidly into the bulk along the grain boundaries during the annealing. The average grain sizes is continuously increased as the content of substitutional Ca is increased from 5[mol%] to 15[mol%], but the average grain size of the sample with content of 20[mol%] Ca is slightly decreased. In the samples with content of 10∼15[mol%] Ca, excellent dielectric properties were obtained as follows; dielectric constant <25000, dielectric loss <0.3[%], and capacitance change rate as a function of temperature <${\pm}$10[%], respectively. All samples in this study exhibited dielectric relaxation with frequency as a functior of the temperature.

• 한국전기전자재료학회논문지
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• 제11권12호
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• pp.1099-1107
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• 1998

In this study, the microstructure and electric conductivity of 5mol% $Gd_2O_3$-5mol% $Y_2O_3-ZrO_2$ system(5G5YZ) with a variation of sintering time at $1600^{\circ}C$ were investigated. By the result of TEM analysis of 5G5YZ sintered for 12h, a microcrack was observed near grain boundary. The change of the sintering time did not affect the lattice conductivity, but the grain boundary contribution was varied with the sintering time. The grain boundary conductivity of the sample sintered for 1h showed the highest value. Furthermore, the activation energy of the total conductivity was independent upon the sintering time and showed approximately 1.01eV. The highest conductivity measured at $1000^{\circ}C$ was 0.0197S/cm with the sample sintered for 1h. Comparing to 0h’s, the thickness ration of grain boundary as a function of sintering time were 0.88, 1.11 and 1.29 for 1h, 5h and 12h, respectively. In case of the sample sintered for 1h, the thickness of the grain boundary showed the lowest value. The increase of the sintering time over 1h made the decrease of the electric conductivity as well as the increase of the grain growth and the thickness of the grain boundary. As a result, it seemed that the proper sintering time for 5G5YZ composition was 1h.

• E2M - 전기 전자와 첨단 소재
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• 제10권10호
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• pp.1034-1040
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• 1997

A solar cell conversion effiency was degraded by grain boundary effect in polycrystalline silicon. Grain boundaries acted as potential barriers as well as recombination centers for the photo-generated carriers. To reduce these effects of the grain boundaries we investigated various influencing factors such as emitter thickness thermal treatment preferential chemical etching of grain boundaries grid design contact metal and top metallization along boundaries. Pretreatment in $N_2$atmosphere and gettering by POCl$_3$and Al were performed to obtain multicrystalline silicon of the reduced defect density. Structural electrical and optical properties of slar cells were characterized before and after each fabrication process. Improved conversion efficiencies of solar cell were obtained by a combination of pretreatment above 90$0^{\circ}C$ emitter layer of 0.43${\mu}{\textrm}{m}$ Al diffusion in to grain boundaries on rear side fine grid finger top Yb metal and buried contact metallization along grain boundaries.

• Nuclear Engineering and Technology
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• 제34권2호
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• pp.132-141
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• 2002

The effects of microstructure on fretting wear were investigated in Inconel 690 tube. The microstructure observation indicated that the solution annealing temperature and time affected the grain size of the Inconel 690 tubes. The carbide morphology, along grain boundaries, was mainly affected by thermal treatment time and temperature. The wear test results showed that specimens with larger grain size and with coarse carbides along grain boundaries had better wear resistance. Cracks were found in specimens with carbides along the grain boundary, while few cracks were found in carbide free specimens. It seemed that the carbides on grain boundary assisted crack formation and propagation in carbide containing specimens. On the other hand, the micro-hardness of specimen did not have a major role in fretting wear. It could be inferred from the SEM images of worn surfaces that the main wear mechanism of carbide containing specimen was delamination, while that of carbide free specimen was abrasion.

• 연구논문집
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• 통권27호
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• pp.183-200
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• 1997

We have calculated the energy of three distinct grain configurations, namely completely connected, partially connected and unconnected configurations, evolving during a spheroidization of polycrystalline thin film by extending a geometrical model due to Miller et al. to the case of spheroidization at both the surface and film-substrate interface. "Stabilitl" diagram defining a stable region of each grain configuration has been established in terms of the ratio of grain size to film thickness vs. equilibrium wetting or dihedral angles at various interface energy conditions. The occurrence of spheroidization at the film-substrate interface significantly enlarges the stable region of unconnected grain configuration thereby greatly facilitating the occurrence of agglomeration. Complete separation of grain boundary is increasingly difficult with a reduction of equilibrium wetting angle. The condition for the occurrence of agglomeration differs depending on the equilibrium wetting or dihedral angles. The agglomeration occurs, at low equilibrium angles, via partially connected configuration containing stable holes centered at grain boundary vertices, whereas it occurs directly via completely connected configuration at large equilibrium angles except for the case having small surface and/or film-substrate interface energy. The initiation condition of agglomeration is defined by the equilibrium boundary condition between the partially connected and unconnected configurations for the former case, whereas it can, for the latter case, largely deviate from the equilibrium boundary condition between the completely connected and unconnected configurations because of the presence of a finite energy barrier to overcome to reach the unconnected grain configuration.

• 한국농업기계학회:학술대회논문집
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• 한국농업기계학회 1993년도 Proceedings of International Conference for Agricultural Machinery and Process Engineering
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• pp.922-931
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• 1993

Boundary element method was used to solve heat conduction problem for predicting temperature distribution in grain storage bin. Temperature of grain in storage is one of the three main abiotic factors, besides the intergranular gas composition and the grain moisture content, that determine the keeping quality and control measures used to protect grain from insects and damaging microflora. Collecting the temperature data at various points in the storage bins at different time of the day over a period of time is one way of finding the temperature distribution, this method requires a lot of time, cost and labour and less efficient. However data so collected serve useful purpose of being used to validate predicted temperature distribution using mathematical models. Mathematical models based on physical principles can potentially predict with accuracy the temperature distribution in a grain storage bin. Using the boundary element model the effect of bin wall material, ambient emperature, bin size etc. on temperature distribution can be studied. A knowledge of temperature distribution in stored grain not only helps in identifying active deterioration , but also gives an indication of potential for detection.

• 한국전자통신학회논문지
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• 제9권3호
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• pp.273-278
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• 2014

다결정 및 단결정 Cu 시편에 CVD를 이용하여 그래핀을 합성 하였으며, 광학현미경 조직사진을 이미지 조절 및 분석 가능한 소프트웨어를 활용하여 광학현미경 조직사진 상에서는 구분이 어려운 그래핀 합성에 따른 미세한 특성들을 이미지 분석을 통하여 구현하였다. 그래핀이 Cu 시편의 결정입계에서 핵 생성하여 Cu 입내로 성장하는 거동을 보이고, 그래핀 성장 시 그래핀 입계의 이동이 Cu 입계 및 기공과 상호작용하는 현상들에 대하여 설명하고, 결과적으로 야기되는 문제들의 원인과 결과를 논하였다.

• 한국분말재료학회지
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• 제27권4호
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• pp.339-342
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• 2020

Since the interaction between the second-phase particle and grain boundary was theoretically explained by Zener and Smith in the late 1940s, the interaction of the second-phase particle and grain boundary on the microstructure is commonly referred to as Zener pinning. It is known as one of the main mechanisms that can retard grain growth during heat treatment of metallic and ceramic polycrystalline systems. Computer simulation techniques have been applied to the study of microstructure changes since the 1980s, and accordingly, the second-phase particle-grain boundary interaction has been simulated by various simulation techniques, and further diverse developments have been made for more realistic and accurate simulations. In this study, we explore the existing development patterns and discuss future possible development directions.

• 한국전기전자재료학회:학술대회논문집
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• 한국전기전자재료학회 2004년도 하계학술대회 논문집 Vol.5 No.2
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• pp.784-789
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• 2004

Bulk ZnO varistor based on Matsuoka, which varied $SiO_2$ addition has fabricated by standard ceramic process. The micro-electrode, which fabricated for investigation on degradation property of the Single Grain Boundary of ZnO varistor, has sticked by lithography semiconductor process. The values of AC degradation has measured with 150% operating voltage in varistor threshold with 120 minute in 60Hz. In here we observed V-I and V-C property in every 30minute. The operating voltage of Single Grain Boundary has shown in variable patterns in the characteristic of V-I Property. By increasing the $SiO_2$ contents, operating value has also increased and dominated on degradation proper. In EPMA analysis, we know that added $SiO_2$ was nearly distributed at the Grain Boundary. $SiO_2$ has gradually distributed in Grain Boundary condition during the process of crystal growth. It contributes to degradation depression and decision of operating voltage. We also demonstrated for using practical application and performance on distribution random loop based on V-I Properties in Single-Grain-Boundary.