• Journal of the Institute of Electronics and Information Engineers
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• v.53 no.3
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• pp.39-45
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• 2016

In this paper, prcess modeling of germanium condensation has been performed and a germanium PMOSFET having nanowire channel implented by the condensation process has been designed and characterized by device simulations. Based on the previous experimental results, our modeling results demonstrate that the ratio of germanium concentration at the silicon germanium-silicon dioxide interface ($C_S$) to that in the bulk region ($C_B$) which are obtainable during the germanium condensation is approximately 4.03 and the effective diffusion coefficient ($D_{eff}$) of germanium atom is $3.16nm^2/s$. Furthermore, a germanium nanowire-channel PMOSFET having the ultra-thin germanium channel on the silicon core that can be fabricated by the germanium condensation has been designed and characterized. As the result, it is confirmed that the proposed device having the coaxial nanowire consisting of silicon core and germanium channel might have superior performances over the device with either all-silicon or all-germanium channel.