• Title/Summary/Keyword: geometrical array

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A Study on a Capacitively Coupled Microstrip Array Antenna (용량성 결합 마이크로스트립 배열 안테나에 대한 연구)

  • Lee, Jong-Ig;Yeo, Junho;Baek, Woon-Seok
    • Proceedings of the Korean Institute of Information and Commucation Sciences Conference
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    • 2015.10a
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    • pp.63-64
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    • 2015
  • In this paper, a microstrip array antenna capacitively coupled to a microstrip line is studied. The array antenna consists of uniformly spaced rectangular microstrip patches arranged close to a feeding microstrip line on a grounded dielectric substrate. The effects of various parameters, such as strip width and length, distance between adjacent patches, gap between strip patches and microstrip feed line, on the antenna performance were examined. By properly adjusting geometrical parameters, the array suitable for a high gain antenna for use in a frequency band centered at 12.5 GHz was designed.

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Optimum Design of Multi-beam Large Reflector Antenna for Satellite Payload (위성 탑재용 다중빔 대형 반사판 안테나의 최적 설계)

  • Yun, So-Hyeun;Uhm, Man-Seok;Yom, In-Bok
    • Journal of Satellite, Information and Communications
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    • v.5 no.2
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    • pp.45-49
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    • 2010
  • This paper presents the study on multi-beam large aperture antenna systems for a satellite payload. Multi-beam large antenna provides the universal communication and broadcasting services to personal portable terminals. The hybrid antenna composed of a large reflector and a feed array forms multi-beams. The feed cluster consists of a group of feed elements and each element should be optimized for the appropriate amplitude and phase. The optimization progress for amplitude and phase was performed by GO (Geometrical Optics) and PO (Physical Optics) method. The number of feed elements as well as the power level per element were also optimized to meet the required EIRP (Effective Isotropically Radiated Power). In conclusion, 30m-class reflector and twenty five elements for fifteen beams over Korean Peninsula were designed through the optimization process.

ANALYSIS OF TURBULENT HEAT TRANSFER FROM STAGGERED PIN-FIN ARRAYS WITH DIAMOND SHAPED ELEMENTS AT VARIOUS GEOMETRICAL CONFIGURATIONS (엇갈린 다이아몬드형 핀휜의 형상에 따른 난류열전달 성능해석)

  • Cho, A.T.;Kim, K.Y.
    • Journal of computational fluids engineering
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    • v.13 no.2
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    • pp.20-26
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    • 2008
  • A numerical study is carried out to analyze the steady three-dimensional turbulent flow and convective heat transfer in a staggered pin-fin array with diamond shaped elements at various geometrical configurations. Steady Reynolds-averaged Navier-Stokes equations and energy equation are solved using a finite volume based solver. Shear stress transport (SST) model is used as turbulence closure. The computational domain is composed of one pitch of pin-fin displacement with periodic boundary conditions on the surfaces normal to the streamwise direction and the cross-streamwise direction. The numerical results for Nusselt number and friction factor are validated with experimental results. The effects of pin angle, pin height and pitch on Nusselt number, friction factor and efficiency index are investigated.

MultiRing An Efficient Hardware Accelerator for Design Rule Checking (멀티링 설계규칙검사를 위한 효과적인 하드웨어 가속기)

  • 노길수;경종민
    • Journal of the Korean Institute of Telematics and Electronics
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    • v.24 no.6
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    • pp.1040-1048
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    • 1987
  • We propose a hardware architecture called Multiring which is applicable for various geometrical operations on rectilinear objects such as design rule checking in VLSI layout and many image processing operations including noise suppression and coutour extraction. It has both a fast execution speed and extremely high flexibility. The whole architecture is mainly divided into four parts` I/O between host and Multiring, ring memory, linear processor array and instruction decoder. Data transmission between host and Multiring is bit serial thereby reducing the bandwidth requirement for teh channel and the number of external pins, while each row data in the bit map stored in ring memory is processed in the corresponding processor in full parallelism. Each processor is simultaneously configured by the instruction decoder/controller to perform one of the 16 basic instructions such as Boolean (AND, OR, NOT, and Copy), geometrical(Expand and Shrink), and I/O operations each ring cycle, which gives Multiring maximal flexibility in terms of design rule change or the instruction set enhancement. Correct functional behavior of Multiring was confirmed by successfully running a software simulator having one-to-one structural correspondence to the Multiring hardware.

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Design of a Graphic Accelerator uisng 1-Dimensional Systolic Array Processor for Matrix.Vector Opertion (행렬 벡터 연사용 1-차원 시스톨릭 어레이 프로세서를 이용한 그래픽 가속기의 설계)

  • 김용성;조원경
    • Journal of the Korean Institute of Telematics and Electronics B
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    • v.30B no.1
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    • pp.1-9
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    • 1993
  • In recent days high perfermance graphic operation is needed, since computer graphics is widely used for computer-aided design and simulator using high resolution graphic card. In this paper a graphic accelerator is designd with the functions of graphic primitives generation and geometrical transformations. 1-D Systolic Array Processor for Matris Vector operation is designed and used in main ALU of a graphic accelerator, since these graphic algorithms have comonon operation of Matris Vector. Conclusively, in case that the resolution of graphic domain is 800$\times$600, and 33.3nsec operator is used in a graphic accelerator, 29732 lines per second and approximately 6244 circles per second is generated.

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Fabrication and Characterization of Cold Cathode Electron-gun of CRT using Mo-tip Field Emitter Array (몰리브덴 팁 전계 방출 소자를 이용한 CRT의 냉음극 전자총의 제조 및 특성 평가)

  • Ju, Byeong-Kwon;Kim, Hoon;Seo, Sang-Won;Park, Jong-Won;Lee, Yun-Hi;Kim, Nam-Su
    • The Transactions of the Korean Institute of Electrical Engineers C
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    • v.50 no.8
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    • pp.409-413
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    • 2001
  • In the electron-gun of CRT, the Mo-tip FEA was employed as cold cathode in order to replace the conventional thermal cathode. The Mo-tip FEA was designed and fabricated according to CRT specification and mounted on the electron-gun. It was known that fabricated cold cathode electron-gun showed better performance in terms of maximum emission current and switch-on time when compared with the ones of thermal cathode electron-gun, but some geometrical structures in the inside of electron-gun must be changed to reduce the gate leakage current. Finally, the potential applicability was guaranteed by means of operating the 19 inch-sized LG-color CRT using the fabricated cold cathode electron-gun.

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Computationally Efficient Adaptive Beamforming Method Based on Interference Subspace Extraction (간섭 부공간 추출에 기초한 계산이 간단한 적응 빔 형성 기법)

  • Choi, Yang-Ho
    • Journal of Industrial Technology
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    • v.31 no.B
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    • pp.3-7
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    • 2011
  • This paper addresses a computationally simple adaptive beamforming method to cancel interferences arriving onto a sensor array. In the proposed method, an estimate of the interference subspace is extracted from a submatrix of the sample covariance matrix and an orthonormal basis for the estimated subspace is efficiently found, one basis vector being updated every sample. Its computational burden is just $O(M{\eta})$ in an M-sensor array when ${\eta}$ directional signals are present. The new method does not make any premises of the geometrical structure of arrays, and can be applied to arbitrary arrays.

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Fabrication and characterization of fine pitch IR image sensor using a-Si (비정질 실리콘을 이용한 미세 피치 적외선 이미지 센서 제조 및 특성)

  • Kim, Kyoung-Min;Kim, Byeong-Il;Kim, Hee-Yeoun;Jang, Won-Soo;Kim, Tae-Hyun;Kang, Tai-Young
    • Journal of Sensor Science and Technology
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    • v.19 no.2
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    • pp.130-136
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    • 2010
  • The microbolometer array sensor with fine pitch pixel array has been implemented to the released amorphous silicon layer supported by two contact pads. For the design of focal plane mirror with geometrical flatness, the simple beam test structures were fabricated and characterized. As the beam length decreased, the effect of beam width on the bending was minimized, Mirror deformation of focal plane in a real pixel showed downward curvature by residual stress of a-Si and Ti layer. The mirror tilting was caused by the mis-align effect of contact pad and confirmed by FEA simulation results. The properties of bolometer have been measured as such that the NETD 145 mK, the TCR -2 %/K, and thermal time constant 1.99 ms.

Fabrication of Microlens Array by UV-molding (UV 성형을 통한 마이크로 렌즈 어레이의 제작)

  • 김석민;임지석;강신일;전병희
    • Transactions of Materials Processing
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    • v.13 no.3
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    • pp.236-241
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    • 2004
  • UV-molded microlens arrays with high replication quality were fabricated using a parametric design method. It is important to maximize the replication quality, because one can obtain the replicated micro-optical components with desired properties by accurate control of the shape. In the present study, nickel mold inserts for microlens arrays with lenses having diameters between $3\mu\textrm{m}$ and $230\mu\textrm{m}$ were fabricated by electroforming process. An UV-molding system was designed and constructed, a simple technique to avoid micro-air bubbles was first suggested, and the effects of the compression pressure and UV-curing dose on the replication quality of UV-molded microlens arrays with a diameter of $14\mu\textrm{m}$ were examined experimentally. Finally, geometrical and optical properties of the replicated microlens arrays were measured and analyzed.

Radiation Characteristic Analysis of Fresnel Zone Plate Lens Array (프레넬 존 플레이트 렌즈 배열의 방사특성 해석)

  • Kim, Tae Yong;Lee, Hoon-Jae
    • Proceedings of the Korean Institute of Information and Commucation Sciences Conference
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    • 2014.05a
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    • pp.53-54
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    • 2014
  • By using geometrical structure of Fresnel lens, it can be applied with receiver antenna and geodetic system. In this paper, radiation pattern from fresnel lens array of Soret type is calculate by the FDTD method. For simplicity, fresnel lens should be located linearly and considered to be dielectric rod with a relative permittivity.

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