• Title/Summary/Keyword: generator polynomial

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On-board Realtime Orbit Parameter Generator for Geostationary Satellite (정지궤도위성 탑재용 실시간 궤도요소 생성기)

  • Park, Bong-Kyu;Yang, Koon-Ho
    • Aerospace Engineering and Technology
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    • v.8 no.2
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    • pp.61-67
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    • 2009
  • This paper proposes an on-board orbit data generation algorithm for geostationary satellites. The concept of the proposed algorithm is as follows. From the ground, the position and velocity deviations with respect to the assumed reference orbit are computed for 48 hours of time duration in 30 minutes interval, and the generated data are up-loaded to the satellite to be stored. From the table, three nearest data sets are selected to compute position and velocity deviation for asked epoch time by applying $2^{nd}$ order polynomial interpolation. The computed position and velocity deviation data are added to reference orbit to recover absolute orbit information. Here, the reference orbit is selected to be ideal geostationary orbit with a zero inclination and zero eccentricity. Thanks to very low computational burden, this algorithm allows us to generate orbit data at 1Hz or even higher. In order to support 48 hours autonomy, maximum 3K byte memory is required as orbit data storage. It is estimated that this additional memory requirement is acceptable for geostationary satellite application.

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Design of Reed-Solomon Decoder for High Speed Data Networks

  • Park, Young-Shig;Park, Heyk-Hwan
    • Journal of the Korea Institute of Information and Communication Engineering
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    • v.8 no.1
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    • pp.170-178
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    • 2004
  • In this work a high speed 8-error correcting Reed-Solomon decoder is designed using the modified Euclid algorithm. Decoding algorithm of Reed-Solomon codes consists of four steps, those are, compute syndromes, find error-location polynomials, decide error-locations, and determine error values. The decoding speed is increased and the latency is reduced by using the parallel architecture in the syndrome generator and a faster clock speed in the modified Euclid algorithm block. In addition. the error locator polynomial in Chien search block is separated into even and odd terms to increase the overall speed of the decoder. All the functionalities of the decoder are verified first through C++ programs. Verilog is used for hardware description, and then the decoder is synthesized with a $.25{\mu}m$ CMOS TML library. The functionalities of the chip is also verified through test vectors. The clock speed of the chip is 250MHz, and the maximum data rate is 1Gbps.

A Turbo-Coded Modulation Scheme for Deep-Space Optical Communications (Deep-Space 광통신을 위한 터보 부호화 변조 기법)

  • Oh, Sang-Mok;Hwang, In-Ho;Lee, Jeong-Woo
    • The Journal of Korean Institute of Communications and Information Sciences
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    • v.35 no.2C
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    • pp.139-147
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    • 2010
  • A novel turbo coded modulation scheme, called turbo-APPM, for deep space optical communications is constructed. The constructed turbo-APPM is a serial concatenations of turbo codes, an accumulator and a pulse position modulation (PPM), where turbo codes act as an outer code while the accumulator and the PPM act together as an inner code. The generator polynomial and the puncturing rule for generating turbo codes are chosen to show the low bit error rate. At the receiver, the joint decoding is performed by exchanging soft information iteratively between the inner decoder and the outer decoder. In the outer decoder, a local iterative decoding for turbo codes is conducted before transferring soft information to the inner decoder. Poisson distribution is used to model the deep space optical channel. It is shown by simulations that the constructed turbo-APPM provides coding gains over all previously proposed schemes such as LDPC-APPM, RS-PPM and SCPPM.

Design and Analysis of Pseudorandom Number Generators Based on Programmable Maximum Length CA (프로그램 가능 최대길이 CA기반 의사난수열 생성기의 설계와 분석)

  • Choi, Un-Sook;Cho, Sung-Jin;Kim, Han-Doo;Kang, Sung-Won
    • The Journal of the Korea institute of electronic communication sciences
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    • v.15 no.2
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    • pp.319-326
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    • 2020
  • PRNGs(Pseudorandom number generators) are essential for generating encryption keys for to secure online communication. A bitstream generated by the PRNG must be generated at high speed to encrypt the big data effectively in a symmetric key cryptosystem and should ensure the randomness of the level to pass through the several statistical tests. CA(Cellular Automata) based PRNGs are known to be easy to implement in hardware and to have better randomness than LFSR based PRNGs. In this paper, we design PRNGs based on PMLCA(Programable Maximum Length CA) that can generate effective key sequences in symmetric key cryptosystem. The proposed PRNGs generate bit streams through nonlinear control method. First, we design a PRNG based on an (m,n)-cell PMLCA ℙ with a single complement vector that produces linear sequences with the long period and analyze the period and the generating polynomial of ℙ. Next, we design an (m,n)-cell PC-MLCA based PRNG with two complement vectors that have the same period as ℙ and generate nonlinear sequences, and analyze the location of outputting the nonlinear sequence.