• The Journal of Korean Institute of Communications and Information Sciences
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• v.27 no.9C
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• pp.861-870
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• 2002

In this paper, with targeting on the drawback of RSA of operation speed, a new 1024-bit RSA cryptosystem has been proposed and implemented in hardware to increase the operational speed and perform the variable-length encryption. The proposed cryptosystem mainly consists of the modular exponentiation part and the modular multiplication part. For the modular exponentiation, the RL-binary method, which performs squaring and modular multiplying in parallel, was improved, and then applied. And 4-stage CSA structure and radix-4 booth algorithm were applied to enhance the variable-length operation and reduce the number of partial product in modular multiplication arithmetic. The proposed RSA cryptosystem which can calculate at most 1024 bits at a tittle was mapped into the integrated circuit using the Hynix Phantom Cell Library for Hynix 0.35㎛ 2-Poly 4-Metal CMOS process. Also, the result of software implementation, which had been programmed prior to the hardware research, has been used to verify the operation of the hardware system. The size of the result from the hardware implementation was about 190k gate count and the operational clock frequency was 150㎒. By considering a variable-length of modulus number, the baud rate of the proposed scheme is one and half times faster than the previous works. Therefore, the proposed high speed variable-length RSA cryptosystem should be able to be used in various information security system which requires high speed operation.

• Journal of the Institute of Electronics Engineers of Korea SD
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• v.45 no.4
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• pp.94-104
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• 2008

In this paper, we propose a new architecture of multiplier-and-accumulator (MAC) for high speed multiplication and accumulation arithmetic. By combining multiplication with accumulation and devising a hybrid type of carry save adder (CSA), the performance was improved. Since the accumulator which has the largest delay in MAC was removed and its function was included into CSA, the overall performance becomes to be elevated. The proposed CSA tree uses 1's complement-based radix-2 modified booth algorithm (MBA) and has the modified array for the sign extension in order to increase the bit density of operands. The CSA propagates the carries by the least significant bits of the partial products and generates the least significant bits in advance for decreasing the number of the input bits of the final adder. Also, the proposed MAC accumulates the intermediate results in the type of sum and carry bits not the output of the final adder for improving the performance by optimizing the efficiency of pipeline scheme. The proposed architecture was synthesized with $250{\mu}m,\;180{\mu}m,\;130{\mu}m$ and 90nm standard CMOS library after designing it. We analyzed the results such as hardware resource, delay, and pipeline which are based on the theoretical and experimental estimation. We used Sakurai's alpha power low for the delay modeling. The proposed MAC has the superior properties to the standard design in many ways and its performance is twice as much than the previous research in the similar clock frequency.

• The Journal of Korean Institute of Electromagnetic Engineering and Science
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• v.21 no.7
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• pp.761-768
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• 2010

This paper presents an effective method to achieve the wideband waveform for high resolution SAR(Synthetic Aperture Radar) using the frequency multiplication technique. And also this paper analyzes the root causes for the spectral regrowth due to 3rd-order intermodulation in chirp bandwidth expansion scheme using quadrature modulator and frequency multipliers. The amplitude and phase imbalance requirement are defined based on the simulation results in terms of quadrature channel imbalance. This minimizes the degradation of range resolution, peak sidelobe ratio and integrated sidelobe ratio. The wideband chirp generator using the frequency multiplier and memory map scheme was manufactured and the compensation technique was presented to reduce the spectral regrowth of SAR waveform by minimizing the amplitude and phase imbalance. After I and Q channel imbalance adjustment, the carrier level reduces －28.7 dBm to －53.4 dBm. Chirp signal with 150 MHz bandwidth at S-band expands to 600 MHz bandwidth at X-band. The sidelobe levels are reduced by about 8 to 9 dB by compensating the amplitude balance between I and Q channels.

• Journal of Advanced Information Technology and Convergence
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• v.9 no.1
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• pp.115-125
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• 2019

In this paper, the image is received from the camera and the lane is sensed. There are various ways to detect lanes. Generally, the method of detecting edges uses a lot of the Sobel edge detection and the Canny edge detection. The minimum use of multiplication and division is used when designing for the hardware configuration. The images are tested using a black box image mounted on the vehicle. Because the top of the image of the used the black box is mostly background, the calculation process is excluded. Also, to speed up, YCbCr is calculated from the image and only the data for the desired color, white and yellow lane, is obtained to detect the lane. The median filter is used to remove noise from images. Intermediate filters excel at noise rejection, but they generally take a long time to compare all values. In this paper, by using addition, the time can be shortened by obtaining and using the result value of the median filter. In case of the Sobel edge detection, the speed is faster and noise sensitive compared to the Canny edge detection. These shortcomings are constructed using complementary algorithms. It also organizes and processes data into parallel processing pipelines. To reduce the size of memory, the system does not use memory to store all data at each step, but stores it using four line buffers. Three line buffers perform mask operations, and one line buffer stores new data at the same time as the operation. Through this work, memory can use six times faster the processing speed and about 33% greater quantity than other methods presented in this paper. The target operating frequency is designed so that the system operates at 50MHz. It is possible to use 2157fps for the images of 640by360 size based on the target operating frequency, 540fps for the HD images and 240fps for the Full HD images, which can be used for most images with 30fps as well as 60fps for the images with 60fps. The maximum operating frequency can be used for larger amounts of the frame processing.

• The Journal of the Korea institute of electronic communication sciences
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• v.9 no.1
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• pp.17-24
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• 2014

In this paper, we analysed coupling coefficient between dielectric resonator of high dielectric constant and microstrip line to design for low phase noise dielectric resonator by direct coupling. Also we analysed phase noise of dielectric resonance oscillator with parallel feedback circuit to complement Q by high dielectric constant. We obtained a result from high-stability dielectric oscillator which is optimum designed through analysis of dielectric resonance oscillator phase noise and coupling coefficient. The result is that the phase noise was -83.3dBc/Hz@1KHz at 20.25GHz when we used about 3.6 coupling coefficient and ${\epsilon}_r$=30 dielectric resonator of 20.25GHz dielectric resonance oscillator. As a result, we suggested the direct-connect design method by frequency multiplication mode to prevent phase noise loss at K-Band.

• Journal of Forest and Environmental Science
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• v.29 no.1
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• pp.1-14
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• 2013

Acacia mangium is an evergreen fast-growing tropical tree, which can grow up to 30 m tall and 50 cm thick, under favorable conditions. It is a low-elevation species associated with rain forest margins and disturbed, well-drained acid soils. It is native to Papua, Western Irian Jaya and the Maluku islands in Indonesia, Papua New Guinea and north-eastern Queensland in Australia. Due to its rapid growth and tolerance of very poor soils, A. mangium was introduced into some Asian, African and western hemisphere countries where it is used as a plantation tree. A. mangium has good quality wood traits, such as a comparatively low proportion of parenchymatous cells and vessels, white and hard wood, and high calorific value. Therefore, it is useful for a variety of purposes, such as furniture, cabinets, turnery, floors, particleboard, plywood, veneer, fence posts, firewood, and charcoal. It is also being used in pulp and paper making because it has good pulp traits, with high yields of pulp, quality of kraft, and produces paper with good optical, physical and surface properties. Because there are significant provenance differences in growth rate, stem straightness, heartwood formation and frequency of multiple leaders, the productivity and quality also varies depending upon environmental conditions, so genetic improvement programmes have been undertaken in countries like Australia, India, Indonesia, Malaysia, the Philippines, Taiwan and Thailand. The programme includes provenance identifications and testing, plus tree selection and clonal multiplication, establishment of seed orchards and hybridization. The phenology, reproductive biology, fruit characteristics, silvicultural practices for cultivation, pest and diseases problems, production of improved planting stock, harvesting, wood properties and utilization have been discussed in this paper.

• The Journal of Korean Obstetrics and Gynecology
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• v.20 no.4
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• pp.210-216
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• 2007

Purpose: The effects of non-operation treatment on the stress urinary incontinence is low by 20-50%. And the way of operation has higher recovery, but it also has problems of the aftereffects and invasive aspects. So It is demanded for improvement of non-invasive to relieve this disease. Methods: The patient was 55-year-old woman who had suffered from incontinence six years ago. The patient was diagnosed by stress urinary incontinence, and treated by Herbal medicine and acupuncture treatment. The progress of symtoms was evaluated by checking the score of doing multiplication the severity and the frequency. Results: After the oriental medical treatments, the clinical score of stress urinary incontinence was improved from 12 to 0. Conclusion: This study shows that the oriental medicine may be considered for the non-invasive of stress urinary incontinence, and the study of effect is more needed.

• Plant Biotechnology Reports
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• v.4 no.2
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• pp.139-148
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• 2010

Jatropha curcas L. (Physic nut) is a commercially important non-edible oil seed crop known for its use as an alternate source of biodiesel. In order to investigate the morphogenic potential of immature embryo, explants from four developmental stages were cultured on medium supplemented with combinations of auxins and cytokinins. It was found that the size of embryo is critical for the establishment of callus. Immature embryos (1.1-1.5 cm) obtained from the fruits 6 weeks after pollination showed a good response of morphogenic callus induction (85.7%) and subsequent plant regeneration (70%) with the maximum number of plantlets (4.7/explant) on Murashige and Skoog's (MS) medium supplemented with IBA (0.5 $mg\;l^{-1}$) and BA (1.0 $mg\;l^{-1}$). The above medium when supplemented with growth adjuvants such as 100 $mg\;l^{-1}$ casein hydrolysate + 200 $mg\;l^{-1}$ L-glutamine + 8.0 $mg\;l^{-1}$ $CuSO_4$ resulted in an even higher frequency of callus induction (100%). Plant regeneration (90%) with the maximum number of plantlets (10/explant) was achieved on MS medium supplemented with 500 $mg\;l^{-1}$ polyvinyl pyrrolidone + 30 $mg\;l^{-1}$ citric acid + 1 $mg\;l^{-1}$ BA + 0.5 $mg\;l^{-1}$ Kn + 0.25 $mg\;l^{-1}$ IBA. It was observed that plantlet regeneration could occur either through organogenesis of morphogenic callus or via multiplication of pre-existing meristem in immature embryos. The age of immature embryos and addition of a combination of growth adjuvants to the culture medium appear to be critical for obtaining high regeneration rates. Well-developed shoots rooted on half-halfstrength MS medium supplemented with 0.5 $mg\;l^{-1}$ IBA and 342 $mg\;l^{-1}$ trehalose. The rooted plants after acclimatization were successfully transferred to the field in different agro-climatic zones in India. This protocol has been successfully evaluated on five elite lines of J. curcas.

• Journal of the Korea Institute of Information and Communication Engineering
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• v.20 no.1
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• pp.123-130
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• 2016

In this paper, a high-performance arithmetic unit which can efficiently accelerate a number of algorithms for multimedia application was designed. The 3-stage pipelined arithmetic unit can execute 38 operations for complex and fixed-point data by using efficient configuration for four 16-bit by 16-bit multipliers, new sign extension method for carry-save data, and correction constant scheme to eliminate sign-extension in compression operation of multiple partial multiplication results. The arithmetic unit has about 300-MHz operating frequency and about 37,000 gates on 45nm CMOS technology and its estimated performance is 300 MCOPS(Million Complex Operations Per Second). Because the arithmetic unit has high processing rate and supports a number of operations dedicated to various applications, it can be efficiently applicable to multimedia processors.

• The Journal of Korean Institute of Communications and Information Sciences
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• v.30 no.3C
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• pp.176-184
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• 2005

In this paper, we implemented an Elliptic Curve Cryptography(ECC) processor for Digital Transmission Contents Protection (DTCP), which is a standard for protecting various digital contents in the network. Unlikely to other applications, DTCP uses ECC algorithm which is defined over GF(p), where p is a 160-bit prime integer. The core arithmetic operation of ECC is a scalar multiplication, and it involves large amount of very long integer modular multiplications and additions. In this paper, the modular multiplier was designed using the well-known Montgomery algorithm which was implemented with CSA(Carry-save Adder) and 4-level CLA(Carry-lookahead Adder). Our new ECC processor has been synthesized using Samsung 0.18 m CMOS standard cell library, and the maximum operation frequency was estimated 98 MHz, with the size about 65,000 gates. The resulting performance was 29.6 kbps, that is, it took 5.4 msec to process a 160-bit data frame. We assure that this performance is enough to be used for digital signature, encryption and decryption, and key exchanges in real time environments.