• Title/Summary/Keyword: formal specification

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A Synthesis Method of Software Fault Tree from NuSCR Formal Specification using Templates (템플릿에 기반한 NuSCR 정형 명세의 소프트웨어 고장 수목 생성 방법)

  • Kim, Tae-Ho;Yoo, Jun-Beom;Cha, Sung-Deok
    • Journal of KIISE:Software and Applications
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    • v.32 no.12
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    • pp.1178-1191
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    • 2005
  • In this paper, we propose a synthesis method of software fault tree from software requirements specification written in NuSCR formal specification language. The software fault tree, proposed in this paper, reflects requirements on both structure and behavior and it is an integrated form. The software fault tree can be used for analyzing safety in the view of structure and behavior. We propose templates for each components in NuSCR specification language and a synthesis method of software fault tree using the templates. The research was applied into the main trip logic of the reactor protection system of ARP1400, the Korean next generation nuclear reactor system, developed by KNICS. And we evaluate feasibility of our approach through this case study.

A Methodology for Variable Structure System Specification: Formalism, Framework, and Its Application to ATM-Based Network System

  • Lee, Kyou-H.;Choi, Kil-Y.;Kim, Jae-G.;Vansteenkiste, G.C.
    • ETRI Journal
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    • v.18 no.4
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    • pp.245-264
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    • 1997
  • This paper presents a formalism-based methodology and its implemented environment which constitutes a sound framework for real-time systems development. The software and/or hardware systems developed in such a formal manner are well structured and maintainable. We first propose a set-theoretic VSSS (Variable Structure System Specification) formalism. This formalism is the core of the presented methodology which supports a means of formal specification for real-time systems. We then develop the environment, including VSSS language definition, a translator for the language, and supporting libraries for real-time execution. Finally, a demonstration of the methodology in development of a real-time event manager, a subsystem of an ATM-based communication system, shows the correctness and efficiency of the methodology.

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System Specification-based Design of Mobile Alarm System for Privacy Protection (시스템 명세화 기법 기반의 개인정보보호 모바일 알람 시스템 설계 및 구현)

  • Jang, Eun-Young;Kim, Hyung-Jong
    • Journal of the Korea Institute of Information Security & Cryptology
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    • v.20 no.1
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    • pp.113-121
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    • 2010
  • The system specification is a system theory based formal representation method for systems' structure and behavior modeling. When we make use of the system specification method in each step of software development, we can derive a hierarchical and modularized system design which enables us to manage the software development process flexibly. This research presents system specification based design of a mobile alarm system which sends alerts about illegal usage of private information and manages the response against the each alert. In our design of mobile alarm system, there are formal definition of alert message overcoming the functional limitation of mobile device and hierarchical modularized modeling of alarm processing using system specification. The efficiency of making use of the system specification is shown by applying the specification method to implementation of mobile alarm system. The contribution of this work is in design and implementation of mobile alarm system which enables us to handle the private information leakage situation more flexible way using system specification based software designing method.

A Model Formalization Methodology of Discrete Event Simulation with Formal Tools (형식 도구를 이용한 이산사건 시뮬레이션의 모델 형식화 방법론)

  • ;;Jeong, Young Sik;Baik, Doo Kwon
    • Journal of the Korean Operations Research and Management Science Society
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    • v.17 no.3
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    • pp.79-99
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    • 1992
  • The DEVS (Discrete Event system Specification) formal model for discrete event simulation is a hierarchical, modular model. Because the DEVS formal model has a mathematical structure, it provides a theoretic background of discrete event simulation model. However, the DEVS formal model is difficult to understand because of its mathematical structure. Also, since the DEVS formal model is often constructed by heuristic, subjective method of model designer from the model, a systematic model built-in methodology does not exist. In this paper, we propose the model formalization methodology from an informal model to the DEVS formal model. For this formalization methodology, we introduce formal tools for model construction based on the DEVS ( from an informal model : Event Dependency Graph (EDG) for the event analysis and State Representation Graph(SRG) for the system state analysis.

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Development Methodology of Safety-Critical System Using Formal Method (정형기법을 이용한 Safety-Critical System 개발 방법론)

  • 성창훈;이나영;오승록;최진영
    • Proceedings of the Korean Information Science Society Conference
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    • 2000.10a
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    • pp.486-488
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    • 2000
  • 본 연구는 정형기법을 사용하여 Safety-Critical System의 개발 방법론을 제시한다. Safety-Critical System의 전체적인 개발 과정을 제시하고 Safety-Critical System 중의 하나인 원자력 발전소 시스템 중 Reactor Protection System(RPS)을 정형 명세(Formal Specification)하고 정형 검증(Formal Verification)하는 과정과 그에 따른 각 과정의 Compliance를 확인하는 예를 든다. 여기서 정형 명세에는 Software Cost Reduction(SCR)이하는 도구가 사용되었고, 정형 검증에는 SPIN이, Compliance를 확인하는 데에는 Prototype Verification System(PVS)를 사용하였다.

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Monitoring and Checking Concurrent Java Programs with HDTL (HDTL을 이용한 병렬 자바 프로그램의 모니터 링과 검사)

  • Cho, Seung-Mo;Kim, Hyung-Ho;Cha, Sung-Deok;Bae, Doo-Hwan
    • Journal of KIISE:Software and Applications
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    • v.29 no.5
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    • pp.345-354
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    • 2002
  • There have been many researches about monitoring and checking the implementations during run-time using formal requirement specification. They usually adopt temporal logics or their extensions to specify the requirements for the implementations. However, most of the systems fail to support the specification of requirements fir dynamic systems - systems whore components are created and removed during run-time. Unlike analysis or design models, most actual implementations are dynamic, so the notion of instances should be employed in the property specification language. In this paper, we show how we can monitor and check Java programs using our temporal logic for dynamic systems (HDTL). We suggest a framework in which the execution of Java programs are monitored and chocked against given HDTL requirements.

Feature Model Specification Method in Product-Line Development (프로덕트 라인 개발에서 피쳐 모델의 명세화 기법)

  • 송재승;김민성;박수용
    • Journal of KIISE:Software and Applications
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    • v.30 no.11
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    • pp.1001-1014
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    • 2003
  • In a feature modeling, problems such as ambiguities, interpretation errors, incompleteness, etc caused by informal specification occur in the modeling phase. Therefore, feature specification method and processes are suggested in this paper to resolve these problems. The structure and language of feature modeling is defined in this paper to specify various features. First, this feature model is abstracted in the meta-level to get predicates and attributes. Formal feature model specification method is proposed using multi-paradigm language. Second, Feature specification process is proposed to describe how to specify feature formally. And third, Feature interaction management is defined to solve the problems caused between specified features. Finally, the proposed feature specification method is applied to Distributed Meeting Scheduler System domain.

Component-Z: A Formal Specification Language Extended Object-Z for Designing Components (Component-Z: Object-Z를 확장한 컴포넌트 정형 명세 언어)

  • 이종국;신숙경;김수동
    • Journal of KIISE:Software and Applications
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    • v.31 no.5
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    • pp.677-696
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    • 2004
  • Component-based software engineering (CBSE) composes reusable components and develops applications with the components. CBSE is admitted to be a new paradigm that reduces the costs and times to develop software systems. The high quality of component designs can be assured if the consistency and correctness among the elements of a component are verified with formal specifications. Current formal languages for components include only some parts of contracts between interfaces, structural aspects and behavioral aspects of component, component-based system, component composition and variability. Therefore, it is not adequate to use current formal languages in all steps of a component design process. In this paper, we suggest a formal language to specify component designs Component-Z. Component-Z extends Object-Z, adds new notations to specify components. It can be possible to specify interfaces, the inner structure of a component, inner workflows, and workflows among interfaces with Component-Z. In addition, Component-Z provides the notations and semantics to specify variability with variation points, variants and required interfaces. The relation between interfaces and components is defined with mapping schemas. Parallel operator is used to specify component composition. It can be possible to describe deployed components with the specifications of component-based systems. Therefore, the formal specification language proposed in this paper can represent all elements to design components. In the case study, we specify an account management system in a bank so that we show that Component-Z can be used in all steps of component design.

A Safety Verification of the Modified BLP Model using PVS (PVS를 이용한 수정된 BLP 모델의 안전성 검증)

  • Koo Ha-Sung;Park Tae-Kue;Song Ho-Keun
    • Journal of the Korea Institute of Information and Communication Engineering
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    • v.10 no.8
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    • pp.1435-1442
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    • 2006
  • The ideal method of safety evaluation is to verify results of execution against all possible operations within operating system, but it is impossible. However, the formal method can theoretically prove the safety on actual logic of operating system. Therefore we explain the contents of the art of the safety verification of security kernel, and make a comparative study of various standardized formal verification tools. And then we assigned PVS(Prototype Verification system) of SRI(Stanford Research Institute) to verify the safety of a modified BLP(Bell & LaPadula) model, the core access control model of multi-lavel based security kernel. Finally, we describe formal specification of the revised BLP model using the PVS, and evaluate the safety of the model by inspecting the specification of the PVS.

Study on Highly Reliable Drone System to Mitigate Denial of Service Attack in Terms of Scheduling (고신뢰 드론 시스템을 위한 스케줄링 측면에서의 서비스 거부 공격 완화 방안 연구)

  • Kwak, Ji-Won;Kang, Soo-Young;Kim, Seung-Joo
    • Journal of the Korea Institute of Information Security & Cryptology
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    • v.29 no.4
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    • pp.821-834
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    • 2019
  • As cyber security threats increase, there is a growing demand for highly reliable systems. Common Criteria, an international standard for evaluating information security products, requires formal specification and verification of the system to ensure a high level of security, and more and more cases are being observed. In this paper, we propose highly reliable drone systems that ensure high level security level and trust. Based on the results, we use formal methods especially Z/EVES to improve the system model in terms of scheduling in the system kernel.