• Title/Summary/Keyword: folded cascode operational amplifiers

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Design of a single-pixel photon counter using a self-biased folded cascode operational amplifier (자체 바이어스를 갖는 Folded Cascode OP Amp를 사용한 Single Pixel Photon Counter 설계)

  • Jang, Ji-Hye;Hwang, Yoon-Guem;Kang, Min-Cheol;Jeon, Sung-Chae;Huh, Young;Ha, Pan-Bong;Kim, Young-Hee
    • Proceedings of the Korean Institute of Information and Commucation Sciences Conference
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    • 2009.05a
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    • pp.678-681
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    • 2009
  • A single-pixel photon counter is designed using a folded cascode CMOS operational amplifier which is self-biased. Since there is no need for a voltage bias circuit, the layout area and power consumption of the designed counter are reduced. The signal voltage of the designed charge sensitive amplifier (CSA) with the MagnaChip $0.18{\mu}m$ CMOS process is simulated to be 138mv, near the theoretical voltage of 151mV. And the layout area of the designed counter is $100{\mu}m{\times}100{\mu}m$.

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Intergrated circuit design of power-stabilizing circuitry for optical transmitter (광송신기용 광파워 안정화 회로의 집적회로 설계)

  • 이성철;박기현;정행근
    • Journal of the Korean Institute of Telematics and Electronics B
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    • v.33B no.3
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    • pp.47-55
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    • 1996
  • An optical transmitter, which is a key component of the optical transmission system, converts the electrical signal to optical signal and consists of a high-speed current-pulse driver for laser diode and low-speed feedback loops that stabilize optical power against aging, power supply voltage fluctuations, and ambient temperature changes. In this paper, the power-stabilizing part, which forms the bulk of the optical transmitter circuitry was designed in integrted circuits. Operational amplifiers and reference voltage generation circuits, which were identified as key building blocks for the power-stabilizing feedback loops, were designed and were subsequently verified through HSPICE simulations. The designed operational amplifier consists of a two-stage folded cascode amplifier and class AB output stage, whereas the reference voltage is obtained by bandgap reference circuits. Finally the power-stabilizing circuitry was laid out based on 3\mu$m CMOS design rules for fabrication.

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