• Journal of Broadcast Engineering
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• v.2 no.2
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• pp.136-145
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• 1997

As a 3D mesh model consists of a lot of vertices and polygons and each vertex position is represented by three 32 bit floating-point numbers in a 3D coordinate, the amount of data needed for representing the model is very excessive. Thus, in order to store and/or transmit the 3D model efficiently, a 3D model compression is necessarily required. In this paper, a 3D model compression method using PRVQ (predictive residual vector quantization) is proposed. Its underlying idea is based on the characteristics such as high correlation between the neighboring vertex positions and the vectorial property inherent to a vertex position. Experimental results show that the proposed method obtains higher compression ratio than that of the existing methods and has the advantage of being capable of transmitting the vertex position data progressively.

• Journal of the Korean Institute of Telematics and Electronics T
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• v.36T no.1
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• pp.1-7
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• 1999

We present VLSI architecture for a high performance 2-D DCT processor which is used compressing system of real time image processing or HDTV using fast computational algorithm of the Optimized Integer Cosine Transform(OICT). The coefficients of the OICT are integer, so the OICT performs only the integer operations for both forward and inverse transform. Therefore the proposed architecture could be greatly enhanced in improving the speed, reduced the hardware cost considerably by replacing the multiplication operations with shift and addition operations compared with DCT which performs floating-point operations.

• 제어로봇시스템학회:학술대회논문집
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• 1991.10b
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• pp.1904-1909
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• 1991

Software linear and exponential acceleration/deceleration algorithms for control of machine axes of motion in industrial robots and CNC machine tools are proposed. Typical hardware systems used to accelerate and decelerate axes of motion are mathematically analyzed. Discrete-time state equations are derived from the mathematical analyses for the development of software acceleration/deceleration algorithms. Synchronous control method of multiple axes of motion in industrial robots and CNC machine tools is shown to be easily obtained on the basis of the proposed acceleration/deceleration algorithms. The path error analyses are carried out for the case where the software linear and exponential acceleration/deceleration algorithms are applied to a circular interpolator. A motion control system based on a floating point digital signal processor (DSP) TMS 320C30 is developed in order to implement the proposed algorithms. Experimental results demonstrate that the developed algorithms and the motion control system are available for control of multiple axes and nonlinear motion composed of a combination of lines and circles which industrial robots and CNC machine tools require.

• Journal of the Korean Institute of Intelligent Systems
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• v.12 no.4
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• pp.373-378
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• 2002

In fuzzy inferencing, most of conventional fuzzy controllers have problems of speed down in floating point operations of fuzzy membership functions in (0,1) as compared with integer operations. Therefore, in this paper, we propose a high-speed fuzzy controller with only integer operations. In this, for fast fuzzy computations, we use a scan line conversion algorithm to convert lines of each fuzzy linguistic term to the set of the closest integer pixels. We also implement a GUI (Graphic User Interface) application program for the convenient environments to modify and input fuzzy membership functions.

• Journal of Korea Game Society
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• v.9 no.2
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• pp.135-142
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• 2009

Mesh denoising is a method to remove noise applying various filters. However, those methods usually spend much time since filtering is performed on CPU. Because GPU is specialized for floating point operations and faster than CPU, real-time processing for complex operations is possible. Especially mesh denoising is adequate for GPU parallel processing since it repeats the same operations for vertices or triangles. In this paper, we propose mesh denoising algorithm based on bilateral filtering using GPU parallel processing to reduce processing time. It finds neighbor triangles of each vertex for applying bilateral filter, and computes its normal vector. Then it performs bilateral filtering to estimate new vertex position and to update its normal vector.

• Journal of Korea Multimedia Society
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• v.8 no.7
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• pp.882-888
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• 2005

MPEG-2 Advanced Audio Coding (AAC) has already been standardized as a sophisticated next generation technology AAC provides an audio signal that has CD quality at 96-128kbps/stereo. This paper describes a high-quality and efficient software implementation of an MPEG-2 AAC LC Profile encoder. Common scalefactor and noisless coding are accelerated by $45\%$ and $27\%$, respectively, through the use of TMS320C30 instructions. The implemented encoder uses 7.5kWords of program memory, 18kWords of data ROM and 92kBytes of data RAM, respectively. The results of subjective Qualify test showed that the sound quality achieved at 96kbps/stereo was equivalent to that of MP3 at 128kbps/stereo.

• Journal of the Korea Computer Industry Society
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• v.2 no.4
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• pp.547-564
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• 2001

In this paper a simulation has been performed to compare and evaluate the performance between the EPRCA(Enhanced Proportional Rate Control Algorithm) and EMRCA(Explicit Max_min Rate Control Algorithm) switches. The variation of the ACR at the source end system, the queue length, the utilization rate of the link bandwidth and the share fairness at the transient and steady states are used as the evaluation criteria for the simulation. The EMRCA switch is more stable than the EPRCA switch and reduces its buffer size. Also, it achieves a higher utilization rate of the link bandwidth than the EPRCA switch. The hardware complexity of the EMRCA switch is significantly lower than the EPRCA and other rate-based switches. Since it eliminates the necessity of the floating-point operation for calculation of the MACR(Mean Allowed Cell Rate) at the switch.

• Proceedings of the KIEE Conference
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• 1994.07a
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• pp.505-508
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• 1994

This paper describes an implementation of a single phase PWM ac/dc converter whose control scheme can be directly applied to the rectification of ac traction system. Power circuit using self-commutated switching devices(GTO) provides input power factor correction with dc voltage regulation. Effective compensation of load variations and line disturbance can be accomplished by real time instantaneous control of ac input current and dc link voltage using 32 bit floating point DSP. Parallel operation of two converters reduces the input line current ripple. Experimental results of the two parallel converter system are shown in the 20KW range for the verification of the system.

• KIPS Transactions on Software and Data Engineering
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• v.2 no.11
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• pp.809-814
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• 2013

Summed area table (SAT) is a data structure in which the sum of pixel values in an arbitrary rectangular area can be represented by the linear combination of four pixel values. Since SAT serially accumulates the pixel values from an image corner to the other corner, a high-resolution image can yield overflow in a floating-point representation. In this paper, we present a new SAT construction technique, which accumulates only the residuals from the linearly-regressed representation of an image and thereby significantly reduces the accumulation errors. Also, we propose a method to find the integral of the linear regression in constant time using double integral. We performed experiments on the image reconstruction, and the results showed that our approach more reduces the accumulation errors than the conventional fixed-offset SAT.

• The Transactions of The Korean Institute of Electrical Engineers
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• v.59 no.6
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• pp.1150-1158
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• 2010

In this paper, a new reliable portable activity monitoring device implemented with the buddhist-style bowing activity and walking step detection algorithm, is presented. In order to monitor the bowing and walking activities, miniaturized 3-axis accelerometer sensor with the sensitivity of 800 mV/g was used. After initial signal conditioning, vector magnitude of accelerometer signals was calculated. Syntactic peak detection method was used in order to feature points. All signal processing algorithms were implemented in ultra-low power microcontroller MSP430 with double precision floating point arithmetic. For evaluation, 19 young man($24.22\pm5.22$ yrs) and woman($22.28\pm2.72$ yrs) were involved. The accuracy of the proposed algorithms were 98.91 %($\pm0.011$) for walking step detection and 98.25 %($\pm0.023$) for buddhist-style bowing activity. Comparing to the commercialized pedometer accuracy, 87.1 %($\pm0.058$), the proposed walking step detection algorithms show more reliable accuracy.