• 대한임베디드공학회논문지
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• 제7권3호
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• pp.143-150
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• 2012

In this paper, we introduce an intelligent quadruped walking robot that can perform stable walking and a couple of intelligent behaviors. The developed robot has two sets of ultrasonic sensors and six sets of infrared sensors and can perform obstacle avoidance by detecting obstacles and estimating the distances and directions of those obstacles. The robot also has a stereo camera and can paly soccer by detecting a ball and estimating the 3 dimensional coordinates of the ball. In performing those intelligent behaviors, the robot needs to have the capability of generating its walking patterns, solving the inverse kinematics problem, and interfacing several sensors in realtime. Therefore we designed a hierarchical controller that consists of a main controller and an auxiliary controller. The main controller is a 32-bit DSP that can perform fast floating-point opertaion and the auxiliary one is a 8-bit micro-controller. We showed that the developed quadruped walking robot successfully perform those intelligent behaviors through experiments.

• Transactions on Control, Automation and Systems Engineering
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• 제3권4호
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• pp.242-249
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• 2001

In this paper, the open-loop state response of the two-time-scale systems by unified approach using the $\delta$-operator is presented with an example of the aircraft longitudinal dynamics. First, the $\delta$-operator system unifies both the continuous system and the discrete system simultaneously, and the $\delta$-operator approach improves the finite word-length characteristics. This saves more computing time than that of the discrete system. Second, the singular perturbation method by block diagonalization reduces the sizes and orders of the systems. This also reduces the floating-point operations (flops). The advantage of those two approaches is shown by comparing our results with the earlier ones in the illustrative example of the longitudinal motion of F-8 aircraft.

• 제어로봇시스템학회:학술대회논문집
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• 제어로봇시스템학회 1991년도 한국자동제어학술회의논문집(국내학술편); KOEX, Seoul; 22-24 Oct. 1991
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• pp.292-298
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• 1991

A new 6-axis robot controller with a high-speed 32-bit floating-point DSP TMS32OC30 has been developed in Samsung Electronics. The controller composed of Intel 80386 microprocessor for the main controller, and TKS32OC30 DSP chip for joint position controller. The characteristics of the controller are high sampling rate of 200us and fast reponsibility. The main controller supports MS-DOS, kinematics, trajectory planning, and sensor fusion functions which are vision, PLC, and MAP. The one high speed DSP chip is used for controlling 6 axes of a robot in 200us simultaneously. The control law applied is PID controller including a velocity feedforvard in joint position controller. The performance tests, such as command following, CP, were conducted for the controller integrated with a 6 axes robot developed in Samsung Electronics. The results showed a good performance. This controller can also perform the system control with other controllers, the communication with high priority controllers, and visual information processing.

• 제어로봇시스템학회:학술대회논문집
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• 제어로봇시스템학회 1988년도 한국자동제어학술회의논문집(국내학술편); 한국전력공사연수원, 서울; 21-22 Oct. 1988
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• pp.16-20
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• 1988

This paper presents a new algorithm for solving the inverse kinematics in real-time applications. The end-tip movement of each link can be resolved into the basic resolution unit, .DELTA.l, which depends on link length, reduction ratio and resolution of the incremental encoder attached to the joint. When x- and y-axis projection of the end-tip movement are expressed in .DELTA.l unit, projectional increments .DELTA.x and .DELTA.y become -1, 0 or I by truncation. By using the incremental computation with these ternary value and some simple logic rules, a coordinate transformation can be realized. Through this approach, it should be noted that the floating-point arithmetic and the manipulation of trigonometric functions are completely eliminated. This paper demonstrates the proposed method in a parallelogram linkage type, two-link arm.

• 전자공학회논문지B
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• 제33B권12호
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• pp.95-105
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• 1996

This paper presents structure optimization of a feedforward neural netowrk controller using the genetic algorithm. It is important to design the neural network with minimum structure for fast response and learning. To minimize the structure of the feedforward neural network, a genralization of multilayer neural netowrks, the genetic algorithm uses binary coding for the structure and floating-point coding for weights. Local search with an on-line learnign algorithm enhances the search performance and reduce the time for global search of the genetic algorithm. The relative fitness defined as the multiplication of the error and node functions prevents from premature convergence. The feedforward neural controller of smaller size outperformed conventional multilayer perceptron network controller.

• 제어로봇시스템학회:학술대회논문집
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• 제어로봇시스템학회 1992년도 한국자동제어학술회의논문집(국제학술편); KOEX, Seoul; 19-21 Oct. 1992
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• pp.306-311
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• 1992

We propose software algorithms which provide the characteristics of acceleration/deceleration essential to high dynamic performance at the transient state where industrial robots or CNC machine tools start and stop. The path error, which is one of the most significant factors in performance evaluation of industrial robots and CNC machine tools, is analyzed for linear, exponential, and parabolic acceleration/deceleration algorithms in case of circular interpolation. The analysis shows that the path error depends on the acceleration/deceleration routine and the servo control system. In experiments, the entire control algorithm including the proposed acceleration/deceleration algorithms is executed on the motion control system with a floating point digital signal processor(DSP) TMS320C30 as a CPU. The experimental results demonstrate that the proposed algorithms are very effective in controlling axes of motion of industrial robots or CNC machine tools with the desired characteristics.

• 대한전자공학회:학술대회논문집
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• 대한전자공학회 1999년도 추계종합학술대회 논문집
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• pp.499-502
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• 1999

This paper presents a PCI (Peripheral Component Interconnect) controller embedded in a multimedia processor, called FLOVA (FLOating point VLIW Architecture), targeting for 3D graphics applications. Fast I/O interfaces are essential for multimedia processors which usually handle large amount of multimedia data. Therefore, in FLOVA, PCI bus is adopted for I/O interface due to fast burst transaction. However, there are several problems in implementation and verification to use burst transaction of PCI. It is difficult to handle data transaction between two units which have two different operating frequency. FLOVA has more higher operating frequency about 100MHz than that of PCI local bus and it makes lower utilization of FLOVA bus. Also, traditional simulation is not sufficient for verification of PCI functionality. In this paper, we propose buffering schemes to implement the PCI controller with wide bandwidth and high bus utilization. Also, this paper shows how to verify the PCI controller using real PCI bus environments before its fabrication.

• 대한전자공학회:학술대회논문집
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• 대한전자공학회 1999년도 추계종합학술대회 논문집
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• pp.1123-1126
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• 1999

In this paper, we propose a real-time implementation of the MPEG-1 layer III and MPEG-2 layer III LSF audio decoding system based on OAK DSP Core. In order to solve the problem of resolution, the system has been used floating-point operation and double precision in dequantization module. The size of ROM is reduced by using the Run-length algorithm of reordered index. The subband synthesis filter module is optimized to have low computational complexity in terms of the size of ROM or RAM. To construct a efficient system, we used both the DSP Core and Parser-Huffman decoder which is implemented with VHDL.

• 대한전자공학회:학술대회논문집
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• 대한전자공학회 1999년도 추계종합학술대회 논문집
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• pp.560-563
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• 1999

In this paper, we present an optimal hardware implementation for preprocessing of a person identification algorithm utilizing vein pattern of dorsal surface of hand. For the vein pattern recognition, the computational burden of the algorithm lies mainly in the preprocessing of the input images, especially in lowpass filtering. we could reduce the identification time to one tenth by hardware design of the lowpass filter compared to sequential computations. In terms of the computation accuracy, the simulation results show that the CSD code provided an optimized coefficient value with about 91.62% accuracy in comparison with the floating point implementation of current coefficient value of the lowpass filter. The post-simulation of a VHDL model has been performed by using the ModelSim$^{TM}$. The implemented chip operates at 20MHz and has the operational speed of 55.107㎳.㎳.

• 한국철도학회:학술대회논문집
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• 한국철도학회 2005년도 춘계학술대회 논문집
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• pp.291-298
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• 2005

This paper describes the characteristic feather of propulsion system adopting mass production. The train formation is composed of 4 cars by 2 Motor cars and 2 Train cars. Acceleration rate must be 3.0 km/h/s or more when the car starts up to 35km/h by 16ton of passenger load. The system information supervision is easy because the system is controlled to perfect digital circuits, all information of an action is stored in a memory and is managed. The control system is composed of a fully digital circuit and a high level software such as C language. The DSP TMS320C31 is used for main processor and has the capability of 50MHz, 32bit floating point operation and has a C compiler. Therefore, the implementation of control algorithm and the change of function are easy. VVVF inverter using IGBT conducted variable combined test, environment test using chamber, interface test and field test etc.