• Title/Summary/Keyword: flash storage

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2WPR: Disk Buffer Replacement Algorithm Based on the Probability of Reference to Reduce the Number of Writes in Flash Memory

  • Lee, Won Ho;Kwak, Jong Wook
    • Journal of the Korea Society of Computer and Information
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    • v.25 no.2
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    • pp.1-10
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    • 2020
  • In this paper, we propose an efficient disk buffer replacement policy which improves hit ratio and reduces writing operations of flash based storages. The flash based storage has many advantages, including a small form factor, non-volatility and high reliability, but there are problems caused by own limitations, like not-in-place update, short life cycle and asymmetric I/O latencies. To redeem these problems, this paper proposes the write weighted probability of reference(2WPR) policy. 2WPR policy predicts re-referencing probability and calculates localities of each page. Furthermore, by weighting write operations to every pages, 2WPR can reduce write operations to flash based storage. In addition, we can improve the performance with higher hit ratio and reduce the number of write operations and consequently shorten the latencies of each operation. The results show that our policy provides improvements of up to 10% for the hit ratio with the reduction of up to 5% for the flash writing operation compared with other policies.

An Efficient Index Buffer Management Scheme for a B+ tree on Flash Memory (플래시 메모리상에 B+트리를 위한 효율적인 색인 버퍼 관리 정책)

  • Lee, Hyun-Seob;Joo, Young-Do;Lee, Dong-Ho
    • The KIPS Transactions:PartD
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    • v.14D no.7
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    • pp.719-726
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    • 2007
  • Recently, NAND flash memory has been used for a storage device in various mobile computing devices such as MP3 players, mobile phones and laptops because of its shock-resistant, low-power consumption, and none-volatile properties. However, due to the very distinct characteristics of flash memory, disk based systems and applications may result in severe performance degradation when directly adopting them on flash memory storage systems. Especially, when a B-tree is constructed, intensive overwrite operations may be caused by record inserting, deleting, and its reorganizing, This could result in severe performance degradation on NAND flash memory. In this paper, we propose an efficient buffer management scheme, called IBSF, which eliminates redundant index units in the index buffer and then delays the time that the index buffer is filled up. Consequently, IBSF significantly reduces the number of write operations to a flash memory when constructing a B-tree. We also show that IBSF yields a better performance on a flash memory by comparing it to the related technique called BFTL through various experiments.

An Adaptive Polling Selection Technique for Ultra-Low Latency Storage Systems (초저지연 저장장치를 위한 적응형 폴링 선택 기법)

  • Chun, Myoungjun;Kim, Yoona;Kim, Jihong
    • IEMEK Journal of Embedded Systems and Applications
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    • v.14 no.2
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    • pp.63-69
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    • 2019
  • Recently, ultra-low latency flash storage devices such as Z-SSD and Optane SSD were introduced with the significant technological improvement in the storage devices which provide much faster response time than today's other NVMe SSDs. With such ultra-low latency, $10{\mu}s$, storage devices the cost of context switch could be an overhead during interrupt-driven I/O completion process. As an interrupt-driven I/O completion process could bring an interrupt handling overhead, polling or hybrid-polling for the I/O completion is known to perform better. In this paper, we analyze tail latency problem in a polling process caused by process scheduling in data center environment where multiple applications run simultaneously under one system and we introduce our adaptive polling selection technique which dynamically selects efficient processing method between two techniques according to the system's conditions.

Utilization of Slaughter Porcine Blood as an Animal Feed (도축부산물인 돈혈의 재활용에 관한 연구)

  • 김정학;박강희;류경선;이제훈
    • Journal of Animal Environmental Science
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    • v.3 no.2
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    • pp.133-143
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    • 1997
  • Optimal conditions for collecting, storing and drying temperature to utilize slaughter porcine blood for blood meals and the effects of blood meal on growth in broiler chicks were investigated. Dry matter and protein contents of slaughter procine blood were 19.5% and 77%(dry basis), respectively. As for the composites of amino acids in the blood, aspartic acid, arginine, glycine, histidine, leucine, lysine, phenylalanin threonine were shown high. There was no significant difference between the collections by bloodletting and vacuumming in terms of microbial contamination. Storage of slaughter porcine blood showed no differences in protein, DNA and triglyceride contents and pH between the storage methods of freezing (-20$^{\circ}C$) and refrigerating (-4$^{\circ}C$). In case of room temperature storage, however, the decrease in pH and the appearance of new protein due to microbial contaminations increased as the storage periods were prolonged. When drying was done by flash methods, the drying period got shortened as the temperature became higher, yet protein and triglyceride were destoryed more. When drying was done over 120$^{\circ}C$, even at the same degree, the breakdowns of protein and triglyceride increased more as drying period got longer. In feeding trials of broiler chicks, dietary supplementation of the flash dried blood meal at 2% level showed significant difference in growth rate(P<.05%). These results indicated that the appropriate handling and manufacturing of slaughter porcine blood enabled the blood to be used as a protein source for broiler chicks.

Hot Data Identification For Flash Based Storage Systems Considering Continuous Write Operation

  • Lee, Seung-Woo;Ryu, Kwan-Woo
    • Journal of the Korea Society of Computer and Information
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    • v.22 no.2
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    • pp.1-7
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    • 2017
  • Recently, NAND flash memory, which is used as a storage medium, is replacing HDD (Hard Disk Drive) at a high speed due to various advantages such as fast access speed, low power, and easy portability. In order to apply NAND flash memory to a computer system, a Flash Translation Layer (FTL) is indispensably required. FTL provides a number of features such as address mapping, garbage collection, wear leveling, and hot data identification. In particular, hot data identification is an algorithm that identifies specific pages where data updates frequently occur. Hot data identification helps to improve overall performance by identifying and managing hot data separately. MHF (Multi hash framework) technique, known as hot data identification technique, records the number of write operations in memory. The recorded value is evaluated and judged as hot data. However, the method of counting the number of times in a write request is not enough to judge a page as a hot data page. In this paper, we propose hot data identification which considers not only the number of write requests but also the persistence of write requests.

Flash-Based Two Phase Locking Scheme for Portable Computing Devices (휴대용 정보기기를 위한 플래시 기반 2단계 로킹 기법)

  • Byun Siwoo;Roh Chang-bae;Jung Myunghee
    • Journal of Information Technology Applications and Management
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    • v.12 no.4
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    • pp.59-70
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    • 2005
  • Flash memories are one of best media to support portable computer's storages in mobile computing environment. The features of non-volatility, low power consumption, and fast access time for read operations are sufficient grounds to support flash memory as major database storage components of portable computers. However, we need to improve traditional transaction management scheme due to the relatively slow characteristics of flash operation as compared to RAM memory. in order to achieve this goal, we devise a new scheme called Flash Two Phase Locking (F2PL) scheme for efficient transaction processing. F2Pl improves transaction performance by allowing multi version reads and efficiently handling slow flash write/erase operation in lock management process. We also propose a simulation model to show the performance of F2PL. Based on the results of the performance evaluation, we conclude that F2PL scheme outperforms the traditional scheme.

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Design of NAND Flash Translation Layer Based on Valid Page Lookup Table (유효 페이지 색인 테이블을 활용한 NAND Flash Translation Layer 설계)

  • 신정환;이인환
    • Proceedings of the IEEK Conference
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    • 2003.11b
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    • pp.15-18
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    • 2003
  • Flash memory becomes more important for its fast access speed, low-power, shock resistance and nonvolatile storage. But its native restrictions that have limited 1ifetime, inability of update in place, different size unit of read/write and erase operations need to managed by FTL(Flash Translation Layer). FTL has to control the wear-leveling, address mapping, bad block management of flash memory. In this paper, we focuses on the fast access to address mapping table and proposed the way of faster valid page search in the flash memory using the VPLT(Valid Page Lookup Table). This method is expected to decrease the frequency of access of flash memory that have an significant effect on performance of read and block-transfer operations. For the validations, we implemented the FTL based on Windows CE platform and obtained an improved result.

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Flash Memory Shadow Paging Scheme Using Deferred Cleaning List for Portable Databases (휴대용 데이터베이스를 위한 지연된 소거 리스트를 이용하는 플래시 메모리 쉐도우 페이징 기법)

  • Byun Si-Woo
    • Journal of Information Technology Applications and Management
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    • v.13 no.2
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    • pp.115-126
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    • 2006
  • Recently, flash memories are one of best media to support portable computer's storages in mobile computing environment. We propose a new transaction recovery scheme for a flash memory database environment which is based on a flash media file system. We improved traditional shadow paging schemes by reusing old data pages which are supposed to be invalidated in the course of writing a new data page in the flash file system environment. In order to reuse these data pages, we exploit deferred cleaning list structure in our flash memory shadow paging (FMSP) scheme. FMSP scheme removes the additional storage overhead for keeping shadow pages and minimizes the I/O performance degradation caused by data page distribution phenomena of traditional shadow paging schemes. We also propose a simulation model to show the performance of FMSP. Based on the results of the performance evaluation, we conclude that FMSP outperforms the traditional scheme.

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An Efficient Flash Memory B-Tree Supporting Very Cheap Node Updates (플래시 메모리 B-트리를 위한 저비용 노드 갱신 기법)

  • Lim, Seong-Chae
    • The Journal of the Korea Contents Association
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    • v.16 no.8
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    • pp.706-716
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    • 2016
  • Because of efficient space utilization and fast key search times, B-trees have been widely accepted for the use of indexes in HDD-based DBMSs. However, when the B-ree is stored in flash memory, its costly operations of node updates may impair the performance of a DBMS. This is because the random updates in B-tree's leaf nodes could tremendously enlarge I/O costs for the garbage collecting actions of flash storage. To solve the problem, we make all the parents of leaf nodes the virtual nodes, which are not stored physically. Rather than, those nodes are dynamically generated and buffered by referring to their child nodes, at their access times during key searching. By performing node updates and tree reconstruction within a single flash block, our proposed B-tree can reduce the I/O costs for garbage collection and update operations in flash. Moreover, our scheme provides the better performance of key searches, compared with earlier flash-based B-trees. Through a mathematical performance model, we verify the performance advantages of the proposed flash B-tree.

Worst Case Response Time Analysis for Demand Paging on Flash Memory (플래시 메모리를 사용하는 demand paging 환경에서의 태스크 최악 응답 시간 분석)

  • Lee, Young-Ho;Lim, Sung-Soo
    • Journal of the Korea Society of Computer and Information
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    • v.11 no.6 s.44
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    • pp.113-123
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    • 2006
  • Flash memory has been increasingly used in handhold devices not only for data storage, but also for code storage. Because NAND flash memory only provides sequential access feature, a traditionally accepted solution to execute the program from NAND flash memory is shadowing. But, shadowing has significant drawbacks increasing a booting time of the system and consuming severe DRAM space. Demand paging has obtained significant attention for program execution from NAND flash memory. But. one of the issues is that there has been no effort to bound demand paging cost in flash memory and to analyze the worst case performance of demand paging. For the worst case timing analysis of programs running from NAND flash memory. the worst case demand paging costs should be estimated. In this paper, we propose two different WCRT analysis methods considering demand paging costs, DP-Pessimistic and DP-Accurate, depending on the accuracy and the complexity of analysis. Also, we compare the accuracy butween DP-Pessimistic and DP-Accurate by using the simulation.

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